wts701 Winbond Electronics Corp America, wts701 Datasheet
wts701
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wts701 Summary of contents
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... The information contained in this datasheet may be subject to change without notice the responsibility of the customer to check the Winbond USA website (www.winbond-usa.com) periodically for the latest version of this document, and any Errata Sheets that may be generated between datasheet revisions. WTS701 Publication Release Date May 2003 - 1 - PRELIMINARY ...
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... GENERAL DESCRIPTION The WTS701 is a high quality, fully integrated, single-chip Text-to-Speech solution that is ideal for use in applications such as automotive appliances, GPS/navigation systems, cellular phones and other portable products or accessories. The WTS701 product accepts ASCII (Unicode and Big5 for Mandarin) input via a SPI port and converts it to spoken audio via an analog output or digital CODEC output ...
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... S Analog audio input (AUXIN) for driving external audio to the speaker Low Power Consumption x S +2.7 to +3. Supply Voltage CC S Operating Current (typical) CC Convert S Standby Current: I < 1PA (typical) SB Device Characteristics x S Available in 56-lead TSOP package S Industrial temperature range (-40C to +85C) S 3V/5V logic tolerance Publication Release Date: May 2003 - 3 - WTS701 Revision 3.09 ...
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... CCA SSA SSA SSD SSD D IAGRAM MLS CONTROL LOGIC MLS PHOENEME MEMORY ANALOG SIGNAL CONDITIONING ATT CAP V V CCD CCD Figure 1. WTS701 Block Diagram WTS701 RESET FLASH CODESTORE PROCESSOR MEMORY (ROM) RAM AUX AUX OUT OUT AMP SP+ Spkr. AMP SP- VFS 13 BIT CODEC VDX LINEAR/ 2’ ...
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... WTS701 T A YPICAL PPLICATIONS CS\ SS\ MOSI HOST Controller MISO SCLK R/B\ INT\ Figure 2. WTS701 Configuration for Digital (CODEC) Environment. CS\ SS\ MOSI HOST Controller MISO SCLK R/B\ INT\ Figure 3. WTS701 Configuration for Analog Environment Baseband Processor WTS701 VFS VCLK VDX AUXOUT AUXIN SP+ SP- WTS701 ...
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... TABLE OF CONTENTS 1. GENERAL DESCRIPTION.................................................................................................................. 2 2. FEATURES ......................................................................................................................................... 3 3. BLOCK DIAGRAM .............................................................................................................................. 4 3.1. WTS701 Block Diagram ............................................................................................................... 4 3.2. WTS701 Typical Applications....................................................................................................... 5 4. TABLE OF CONTENTS ...................................................................................................................... 6 5. PIN CONFIGURATION ....................................................................................................................... 8 6. PIN DESCRIPTION ............................................................................................................................. 9 7. FUNCTIONAL DESCRIPTION.......................................................................................................... 11 7.1 Text-To-Speech Mechanism ....................................................................................................... 12 7.1.1 Text Normalization ................................................................................................................ 12 7.1.2 Words-to-Phoneme conversion ............................................................................................ 12 7.1.3 Phoneme Mapping ................................................................................................................ 12 7.2 Physical Interface ........................................................................................................................ 13 7.2.1 Clocking Requirements......................................................................................................... 13 7 ...
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... Buffer length limit ............................................................................................................... 65 7.10.3. Undefined characters......................................................................................................... 65 8. TIMING WAVEFORMS ..................................................................................................................... 66 8.1 SPI Timing Diagram..................................................................................................................... 66 8.2 CODEC Timing Diagrams ........................................................................................................... 68 9. ABSOLUTE MAXIMUM RATINGS.................................................................................................... 70 10. ELECTRICAL CHARACTERISTICS ............................................................................................... 71 11. TYPICAL APPLICATION CIRCUIT ................................................................................................. 74 12. PACKAGE DRAWING AND DIMENSIONS .................................................................................... 75 13. ORDERING INFORMATION........................................................................................................... 76 14. VERSION HISTORY ....................................................................................................................... 77 Publication Release Date: May 2003 - 7 - WTS701 Revision 3.09 ...
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... PIN CONFIGURATION The following sections detail the pins of the WTS701 processor. Table 1 shows all the pins and the signals that use them in different configurations. It also shows the type and direction of each signal VDX ...
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... SPI Slave Select input. This is an active LOW input used to select the device to respond to an SPI transaction. I SPI Serial clock input. I Chip Select (active LOW) Pin must be LOW to access WTS701 device. O Ready/busy signal; This pin defaults HIGH indicating the device is ready for data transfer. The pin is driven LOW to handshake a pause in SPI data transfer and Open Drain ...
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... It should be carefully bypassed to Analog Ground to ensure correct device operation. I Analog input pin. This pin should be capacitively coupled. See page 73 for example. O Analog Output for single ended output from the device. Not Connected – must be floating WTS701 FUNCTION . SSA ...
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... FUNCTIONAL DESCRIPTION As a real System-On-Chip solution, the WTS701 performs the overall control functions for host controller and text-to-speech processing. The WTS701 system architecture consists of the following functions: Serial interface to monitor the SPI port and interpret commands and data x Text normalization module to pre-process incoming text into pronounceable words ...
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... Instant Messaging icons or emoticons) into the appropriate text representation. The default abbreviation list supported by the WTS701 is a general one that cannot be modified by the user to match the domain that the text is being loaded from. But the default list can be overridden by the user abbreviation list ...
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... The XTAL1 and XTAL2 pins provide the crystal interface to the device. The clock to the WTS701 processor is configured by a clock configuration register, which must be set by the host processor during the initialization phase. crystal oscillator. An external clock can be connected to the WTS701 providing the clock source for the system, as shown in Figure 6. ...
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... Power Down Mode Upon application of power, the WTS701 will enter the RESET state and then POWER DOWN state. In the POWER DOWN mode, only Class0 SPI commands are valid. (See subsection 7.3.1). The Power Down status of the device can be determined with a RDST (Read Status) command, specified by the RDY bit in STATUS BYTE 0 ...
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... Concurrently, valid data from the WTS701 device to the bus master is available on MISO for the HIGH period of SCLK. The protocol implemented on the WTS701 defines that the first two bytes of data sent in an SPI transaction is a command word. A transaction is defined as the SPI transfers conducted while SS is LOW, the transaction ends when SS returns HIGH ...
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... Flow Control Interface In addition to the SPI interface, the WTS701 has two control lines to facilitate data transfer and host communications. The INT (interrupt) pin is used by the WTS701 to request an interrupt service from the host controller. The interrupt types that the device generates are controlled by the communications control register command (SCOM) ...
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... The following is a description of the analog pins: AUXIN (Analog Input) The AUXIN is an additional audio input to the WTS701. This input has a nominal 694 mV p-p level at its minimum gain setting (0 dB) (See the SAUD Command dB. The use and equivalent circuit of the input amplifier is shown in Figure 7 ...
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... POWER DOWN mode. Issuing a Reset command (RST) resets the WTS701 processor to the initial POWER DOWN state. Applying the reset pin, while the chip is active, allows the host processor to reset the WTS701 to its default values and the IDLE state. ...
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... P OMMUNICATION ROTOCOL The WTS701 is controlled by a series of SPI transactions to send commands to the device. The general format of an SPI transaction is shown in command word. The command word consists of a command byte followed by a command data byte. At the same time, the status register is shifted out on the MISO line. What follows depends on what command is sent ...
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... Class 3 commands have data to return to the host. The R/ B line will go to busy immediately following the command word indicating that the WTS701 is fetching the requested data. Data is put into the BCNT0 and BCNT1 (see subsection 7.3.4) registers and is read out in the two subsequent bytes after released ...
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... Status Register The WTS701 has a sixteen-bit status register whose value is returned to the host controller during the command word. For class 2 commands, the status register is repeatedly returned every two bytes. This status register provides the host with information regarding the current status of the chip. The host can decide on required actions with this information ...
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... Any data sent will be ignored. Abbreviation interrupt has occurred, abbreviation add or abbreviation delete has been completed. Now the ENTER_RRSM command can be sent. Current state of the R/ B pin. If this bit is 0, any data sent will be ignored WTS701 ...
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... FIFO into an internal RAM data buffer. If SPI transmission is too fast for the WTS701 to keep up with, the R/ B line will be asserted (LOW) to pause data transfer. Alternatively, the STATUS register can be monitored for the state of the R/ B signal. ...
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... POWER DOWN mode. The Power Down x command requests that the device enter the POWER DOWN mode. The Reset command resets the device (see subsection 7.4.4). x The Idle command puts WTS701 processor in IDLE mode x Table 5. Status Opcodes. Opcode Mnemonic 0x04 RDST ...
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... Volume up/down x Speed up/down the text-to- x speech conversion Configuration Commands The WTS701 has several configur- ation registers. The commands are: The COM configuration x register governs the behavior of how the chip uses the INT and R/ B hardware lines to communicate with the host ...
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... Put the WTS701 processor in power-down mode. PWUP Power Up This command wakes up the WTS701 processor to IDLE state. The result of this command is that the WTS701 starts the power up sequence, which leads to bringing up internal supplies, resetting the processor, all configuration registers are initialized to their default values and entering IDLE state. As soon as power up sequence has ended, the RDY flag in the status word is asserted ...
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... CONV commands with the additional ASCII text data. 2. The Host may also continue the command (keep SS LOW) and wait for the R/ B pin to go HIGH. As each word is processed by the WTS701, space will become free in the buffer and the R/ B pin will go HIGH until it is full again. ...
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... The stop command (ST) will cause the WTS701 to immediately stop converting, flush the x buffer and enter the wait state. Once the wait state has been entered the device will clear the convert (CONV) bit from the status register and, if enabled, generate an ICVT interrupt. At this stage the CODEC and analog path are still active ...
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... WTS701 Description: Stop conversion. FINW F W INISH ORD This command directs the WTS701 to finish text conversion at the end of the current word. FINW Class Byte Sequence: Host controller WTS701 Description: This indicates that conversion is to end with the processing of the current word. ...
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... WTS701 Description: Read Status word of the device. RVER R V EAD ERSION The Read version command reads the WTS701 version information. The software version information is only valid when the device is powered up. RVER Class Byte Sequence: Host controller WTS701 Description: Read WTS701 Software and Hardware versions. ...
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... Status Byte 1 R EGISTER 3 Type IV 0xC0 0xNN Status Byte 0 Status Byte 1 1 Type I 0x4E Status Byte WTS701 for more information regarding the 0x00 0x00 BCNT1 BCNT0 Table 10 – Configuration 0x00 0x00 XX REG 0xNN Status Byte 1 Publication Release Date: May 2003 Revision 3.09 7 ...
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... SVOL Class Byte Sequence: Host controller WTS701 Description: Set the VOL (volume) configuration register to value 0xNN. 1 Type I 0x4F Status Byte 0 1 Type I 0x50 Status Byte 0 1 Type I 0x51 Status Byte WTS701 0xNN Status Byte 1 0xNN Status Byte 1 0xNN Status Byte 1 7.4.3 - 7.4.3 - 7.4.3 - ...
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... Set the speech pitch to value 0xNN. The valid pitch values are between 0x00 and 0x06 while the default pitch value is 0x05, and these values can be used to control the speech output pitch. The command can be executed only when the WTS701 is in IDLE state. SPTC ...
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... Configuration Registers, which describes all register bits. SPUP Class Byte Sequence: Host controller WTS701 Description: Increase speaking rate (SPD register). 1 Type I 0x53 Status Byte 0 C OMMAND 1 Type I 0x54 Status Byte 0 1 Type I 0x55 Status Byte WTS701 0x00 Status Byte 1 7.4.3 - Configuration 0x00 Status Byte 1 7.4.3 0x00 Status Byte 1 7.4 ...
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... Host controller WTS701 Description: Decrease speaking rate (SPD register). RST R C ESET OMMAND Sending this command has the same affect as a Power-On reset, the WTS701 enters the POWER DOWN state. RST Class Byte Sequence: Host controller WTS701 Description: Reset the WTS701 device. ...
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... Status Byte 0 Status Byte BBREVIATION NTRIES Type IV 0xC8 0x00 Status Byte 0 Status Byte 1 T ABLE Type IV 0xC9 0x00 Status Byte 0 Status Byte WTS701 0x00 0x00 MEM_HI MEM_LOW 0x00 0x00 NUM_HI NUM_LOW 0x00 ….. 0x00 ABBR0 ….. ABRRn ...
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... Illegal Commands All commands described in section 7.4.1 are the only legal commands that should be sent to the WTS701 device, unless stated otherwise. Other commands should not be sent to the device, as the device behavior cannot be predicted. Specific illegal commands are those in which the 2 Most Significant Bits of the Command Byte are zeros and are not defined in this document as commands allowed to be sent to the WTS701 ...
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... Bit 6 Bit 5 Bit 4 ICNT IBUF ICNV AOPU SPPU SPG FDTH CLC4 Table 3, Status bytes WTS701 Bit 3 Bit 2 Bit BUF1 X X MD2 MD1 X X AIG1 X X VL2 VL1 CLC3 CLC2 CLC1 X X SPD2 SPD1 LSB ...
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... Speaker Driver gain selection. SPG 0b Speaker. A 1b: 100 : Speaker. A FDTH 1b: Enable feed-through path from AUXIN to AUXOUT. AIG1..0 AUXIN gain setting 00b – 0dB 01b – 3dB 10b – 6dB 11b – 9dB = 1. 1 WTS701 Publication Release Date: May 2003 Revision 3.09 ...
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... SPD Register SPD2..0 Configure the speech speed register. 0x04 is the fastest speed and 0x00 is the slowest WTS701 ...
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... CODEC for digital audio output. The WTS701 processor state machine The WTS701 functions as a state machine and changes states either in response to a command sent by the host controller, after execution of command is completed result of an internal event. The WTS701 states are described below in reference to ...
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... After a reset condition the device enters the POWER DOWN state. All configuration registers are initialized to their default values after issuing the PWUP command. Once the WTS701 is active and a hardware reset is applied on the RESET pin, the WTS701 will be in IDLE state, and all configuration registers will return to their default values. ...
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... When the internal buffer is full 2. If the host sends data at a rate too fast for the WTS701 to process it to the internal buffer When R/ B becomes active the user may: 1. Wait for the R/ B pin to return to the (HIGH) ready state 2 ...
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... Once the WTS701 has synthesized the contents of the text buffer, it will enter the WAIT state. In this state the audio interface is still active. To disable the audio interface and return to the IDLE state an IDLE command is sent ...
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... Wait for IBUF interrupt Write a new batch of text data to buffer ( < 192 bytes otherwise buffer may overflow) Figure 11. Flow Diagram for Convert Operation. Wait for ICNV Yes Send FIN interrupt or command CNVT cleared Publication Release Date: May 2003 - 45 - WTS701 Send IDLE command Revision 3.09 ...
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... R/ B hardware control line is not compulsory; rather the host can monitor the R/ B bit of the status register to determine when data has been accepted. The status register also contains the ICMD bit. This bit is set to indicate an SPI transaction has been ignored, indicating that the WTS701 processor is unable to service a new command. Asynchronous (Class 0) commands are always accepted ...
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... MISO Type III – Transactions that send data Type III transactions send data to the WTS701. If the data rate exceeds the ability of the WTS701 to read data from the input FIFO or if the internal data queue becomes full then the R/ B line will handshake a pause in the SPI transaction ...
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... SCLK MOSI R/B MISO Type IV – Transactions reading data Type IV transactions read data from the WTS701. Because of the latency required for the WTS701 to place data in the output register must be monitored. Command Byte SSB SCLK ...
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... The WTS701 processor supports analog and digital telephony in various configurations. The WTS701 can be used in digital environments, along with a DSP that controls a CODEC. Therefore, the WTS701 is configured to operate in slave mode, where the control signals are provided by an external source, which is usually the DSP. It supports a variety of single channel CODECs, examples of which ...
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... WTS701 Unsigned Mode 13 Bit Mode 16 Bit Mode 1 1111 1111 1000 1111 1111 1100 0000 1 0000 0000 1000 1000 0000 0100 0000 1 0000 0000 0000 1000 0000 0000 0000 ...
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... MSB Figure 17. CODEC Protocol, 13 bit, Long Frame Sync. VFS MSB Figure 18. CODEC Protocol, 16 bit, Short Frame Sync LSB LSB - 51 - WTS701 ZEROS Publication Release Date: May 2003 Revision 3.09 ...
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... Phonetic Alphabet Playback The WTS701 uses an intermediate phonetic translation represented as an alphabet that represents phonemes and stress for each input word. This feature allows the text sent to the WTS701 to consist of a combination of ASCII characters as well as phonetic alphabet. This capability offers the flexibility to send words already processed for phonetic representation, achieving the desired pronunciation ...
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... G 0x47 C 0x43 J 0x4a P 0x50 Q 0x51 Publication Release Date: May 2003 - 53 - WTS701 Example pet ebt ing ure ent ...
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... Set the speed starts from (e.g. ‘^S1 Hello world’). x Any number that is greater than 4 will be set to 4. It’s the user’s responsibility to verify the WTS701 speed setting before sending a control character and/or SPI command that modify speed. flag ...
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... Set the volume starts from (e.g. ‘^V1 Hello world’). x Any number that is greater than 7 will be set to 0. It’s the user’s responsibility to verify the WTS701 volume setting before sending a control character and/or SPI command that modify volume. 7.7.4 Case Sensitivity The way upper/lower case is handled can be changed by adding a control character in the text sent to control the case sensitivity behavior in real-time ...
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... The WTS701 has support for entering and using custom abbreviations in addition to the general abbreviation table supported internally by the WTS701. There are 2K bytes of flash memory reserved for this purpose. After the WTS701 internal software has been initially programmed, this entire area is free and available for custom abbreviations. ...
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... Example: TTS,text to speech; After this is added using the ABBR_ADD command, when the text “TTS” is sent as part of the convert data, the WTS701 will speak “text to speech” instead Note: when deleting an abbreviation, the abbreviation text is optional. ...
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... The WTS701 is fully programmable to support different available languages or different voices that can be loaded to the device whenever the user wishes to do so. The language or the voice module should be stored externally and transmitted to the WTS701 processor with regards to a specific protocol defined in this section. ...
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... II Read version C – Q ROCESSOR OMMMANDS Opcode Hex Previous State Idle, Convert Power Down Idle, Convert 06 00 Idle, Convert WTS701 UICK EFERENCE ABLE Result Command State Parameters No change None - No change None - No change None - Publication Release Date: May 2003 Revision 3 ...
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... Go To Power Down mode RST 0 I Reset Opcode Hex Previous Result State State Power 02 00 Idle Down Idle, Power 40 00 Convert Down Wait Idle, Power 10 00 Convert Down Wait, Power down - 60 - WTS701 Command Return Value Parameters None - None - None - None - None - None - ...
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... Wait 54 00 Idle, No Convert change Wait 55 00 Idle, No Convert change Wait Idle Convert change Wait Wait Idle Convert - 61 - WTS701 Command Return Value Parameters Text N None data None - None None - None None - None None - None None - None None - None None - ...
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... Value Idle, Wait No Change 51 Value Idle, Wait No Change 52 Value Idle, Wait No Change 14 Value Idle, Wait No Change 77 Value Idle, Wait No Change - 62 - WTS701 Command Return Parameters Value None - Registe r value, dummy byte None - None None - None None - None None - None None - None None ...
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... I Swap _RRS memory M Opcode Hex Previous state C8 00 Idle Idle C7 00 Idle AF 00 Idle 83 00 Idle 0C 00 Idle - 63 - WTS701 Result Command Return State Parameters No None - Num_of_entries change No Abbreviation None - change table entries No Available_mem None - change No Abbreviation N None change information No ...
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... Text Input Format The following table lists the ASCII characters acceptable by the WTS701E (English software version). Please refer to the specific language User’s Guide for more details regarding characters accepted and other development considerations. Note: Unexpected behavior may occur if the input text contains characters that are not defined in this ASCII table ...
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... The max. character length of a white-space-bounded string is 53. The exceeding characters will be truncated. 7.10.3. Undefined characters All the undefined characters will be deleted (prior to the word pornunciation process). The difined characters range from ‘0x00’ to ‘0x7A’ excluding ‘0x22’, ‘0x3E’, and ‘0x60’. Publication Release Date: May 2003 - 65 - WTS701 Revision 3.09 ...
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... TIMING WAVEFORMS 8.1 SPI T D IMING IAGRAM SS T sss T sclkhigh SCLK T T dih dis MOSI T pd TRISTATE MISO SS BIT 7 SCLK R/B T sclklow Figure 20. SPI Timing Specification. BIT 0 Figure 21. SPI R/ B Timing WTS701 T T ssh ssmin rbd rbh T rblow TRISTATE ...
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... R/ B low time T rbh SCLK hold time from High F CLK Frequency O Figure 20 and Figure21) (7) Min Typ Max Units 100 ns 100 100 ns 100 ns 200 5000 kHZ Publication Release Date: May 2003 - 67 - WTS701 Conditions Revision 3.09 ...
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... CODEC T D IMING IAGRAMS t fsp VFS VCLK VDX MSB Figure 22. CODEC Timing — Short Frame Sync. t fsp VFS VCLK VDX MSB Figure 23. CODEC Timing -- Long Frame Sync. t sync t dv MSB-1 LSB t sync t dv MSB-1 LSB - 68 - WTS701 t dhi t dhi ...
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... Min Typ Max Units 128 2048 kHz 8 kHz 100 140 ns 10 140 ns Publication Release Date: May 2003 - 69 - WTS701 23) Conditions % All digital inputs All digital inputs VFS VCLK to VFS VFS to VCLK VCLK to VDX VCLK to VDX Revision 3.09 ...
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... Functional operation is not implied at these conditions. 2 All input pins except for CS signal, which is 3V tolerant ONLY. 3 Case Temperature CCA CCD SSA SSD Condition (3) (2) ( WTS701 (1) Value 0 150 - +150 0.3V 0.3V (2) (V – 1.0V 2.2V 300 C -0 ...
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... CCA CCD Table 20. General Parameters. TEST CONDITIONS - (8) No Load (8) No Load (8) No Load (8) No Load (8) = 3.0V, timing measured at 50% levels WTS701 SPEC (6) (7) MIN TYP MAX 0 0.8 0.4 0.4 V – ...
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... With AUXIN to Speaker, AUXIN AC coupled to V SSA Measured with a 1 kHz, 100 ma sine wave input at V and V pins CC CC With 0TLP input to AUX IN, -0.25 (12 setting 23.5 Differential load WTS701 SPEC UNIT TYP. MAX. 3 150 : 100 pF 1 100 ...
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... SYMBOL Output Gain A OUT Absolute Gain Table 22. AUXOUT Parameters. TEST CONDITIONS 5k : Load (AC Coupled) TEST CONDITIONS 8 steps of 4 dB, referenced to output AUXIN 1.0 kHz 0TLP gain setting measured differentially at SP+/- - 73 - WTS701 SPEC UNIT MIN. TYP. MAX. 1 100 pF 1.2 VDC SPEC UNIT MIN. TYP. ...
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... The following schematic diagrams are extracted from the WTS-ES701 evaluation board schematic. The evaluation system includes the following basic clusters: WTS701 processor cluster working with 3.3V, including an 8-ohm speaker, SPI connector to the host PC via the PC parallel port. For more information about the evaluation system, please refer to the WTS-ES701 User’s Guide. ...
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... PACKAGE DRAWING AND DIMENSIONS 56 L TSOP(I) (14X20 MM) Publication Release Date: May 2003 - 75 - WTS701 Revision 3.09 ...
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... ORDERING INFORMATION WTS701__ __ /__ Language E – English M – Mandarin For the latest product information, access Winbond’s worldwide website at http://www.winbond-usa.com Voice Package Type F – Female T – TSOP 56-leads M – Male - 76 - WTS701 ...
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... Winbond Electronics Corporation Japan 7F Daini-ueno BLDG, 3-7-18 Shinyokohama Kohoky-ku, Yokohama, 222-0033 TEL: 81-45-4781881 FAX: 81-45-4781800 - 77 - WTS701 Winbond Electronics (Shanghai) Ltd. 27F, 299 Yan An W. Rd. Shanghai, 200336 China TEL: 86-21-62365999 FAX: 86-21-62356998 Winbond Electronics (H.K.) Ltd. Unit 9-15, 22F, Millennium City, No. 378 Kwun Tong Rd., ...