wts701 Winbond Electronics Corp America, wts701 Datasheet - Page 14

• Manufacturer Part Number: wts701
• Description: Winbond Single-chip Text-to-speech Processor
• Manufacturer: Winbond Electronics Corp America

Upon application of power, the WTS701 will enter the RESET state and then be in a POWER DOWN
state. In the POWER DOWN mode, only Class0 SPI commands are valid. (See subsection 7.3.1). The
Power Down status of the device can be determined with a RDST (Read Status) command, specified
by the RDY bit in STATUS BYTE 0.
Issuing the PWDN (Power Down) command to the WTS701 processor will return the processor to the
POWER DOWN mode. In POWER DOWN mode the external crystal oscillator is shut off and the
processor is deactivated. POWER DOWN mode is exited by issuing a PWUP (Power Up) command
to the WTS701. The PWUP command should be preceded by a SCLC (Set Clock) command to
ensure correct clock configuration.
The WTS701 can operate over 2.7V to 3.3V supply voltage range. The power supply and ground pins
(V
quality audio. In addition, ATTCAP pin should have a 4.7 µF capacitor connected to ground. This pin
must NOT be left floating. The pins that are marked as NC (Not Connected), MUST be left floating.
V
To minimize noise, the analog and digital circuits in the WTS701 device use separate power busses.
These +3.0 V busses lead to separate pins. For optimal noise immunity, tie the V
close as possible and decouple both supplies as near to the package as possible.
V
The WTS701 series utilizes separate analog and digital ground busses. The analog ground (V
pins should be tied together as close to the package as possible and connected through a low-
impedance path to power supply ground. The digital ground (V
separate low-impedance path to power supply ground. These ground paths should be large enough to
ensure that the impedance between the V
the die is connected to V
NC (Not Connect)
These pins MUST not be connected to the board at any time. Connection of these pins to any signal,
ground or V
CCA
SSA
CCA
, V
, V
, V
SSD
CCD
7.2.2 Power Down Mode
7.2.3 Power and Grounding
CCD
(Ground Inputs)
(Voltage Inputs)
, V
CC
SSA
may result in incorrect device behavior or cause damage to the device.
, V
SSD
) should be carefully bypassed as close to the chip as possible to ensure high
SSD
through the substrate resistance.
SSA
pins and the V
- 14 -
SSD
SSD
pin is less than 3 : . The backside of
) pin should be connected through a
CCD
pins together as
WTS701
SSA
)