at49ld3200 ATMEL Corporation, at49ld3200 Datasheet - Page 8

• Manufacturer Part Number: at49ld3200
• Description: At49ld3200 32-megabit 1m X 32 Or 2m X 16 High-speed Synchronous Flash Memory
• Manufacturer: ATMEL Corporation

Function Truth Table
(V = Valid, X = Don’t Care, H = Logic High, L = Logic Low)
Abbreviations (RA: Row Address, CA: Column Address, NOP: No Operation Command, DWM: Double Word Mode, WM:
Word Mode)
Notes:
8
Command
Register
Row Active
Read
Burst Stop
Power-down
and Clock
Suspend
DQM
No Operation Command
Organization Control
Program/Erase
Fast Program/Erase
Program/Erase Inhibit
Product
Identification
Continuity Test Mode
(3)
1. A
2. In the case CKE is low, two standby modes are possible. Those are standby mode in power-down, and active standby mode
3. DQM sampled at rising edge of a CLK makes a high-Z state the data-out state, delayed by 2 CLK cycles.
4. Precharge command on Synch. DRAM can be used for Burst Stop operation during burst read operation only.
5. Mode selection is controlled by the polarity of WORD pin, “H” state is DWM, “L” state is WM. WORD should be set to the
6. Data is provided through DQ
7. DQ
8. A
9. The user can tie MR and WE together to simplify the interface of the AT49LD3200(B) onto the standard SDRAM bus.
(1)
(2)
AT49LD3200(B)
Mode Register Set command is completed, no new commands can be issued for 3 CLK Cycles, and CS or MR state must
be defined “H” within 3 CLK cycles. Refer to the Mode Register Control Table.
in clock suspend (non-power-down).
Power-down: CKE = “L” (after no command is issued for 60 µs)
Clock Suspend: CKE = “L” (at the range of Row Active, Read and Data Out)
desired state during power-up and prior to any device operation.
(7)
0
0
~ A
= A
0
(6)
~ DQ
6
2
Mode Register Set
Row Access
& Latch
Column Access
& Latch
(Precharge on
Synch. DRAM)
Two
Standby
Mode
Mode Register Set
Read
: Program keys (@MRS). After power-up, mode register set can be set before issuing other input command. After the
= A
(6)
(5)
31
11
will output Manufacturer Code/Device Code.
(4)
= “H”, A
Entry
Exit
Entry
Exit
1
= A
10
0
= A
CKEn-1
~ DQ
12
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
X
L
= “L”
31
. Refer to AC programming and erasing waveforms.
CKEn
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
CS
H
X
X
X
H
X
L
L
L
L
L
L
L
L
L
L
L
L
RAS
H
H
H
H
H
H
H
H
L
L
L
X
X
X
X
X
L
X
CAS
H
H
H
H
L
L
X
X
X
X
L
L
L
X
L
L
L
X
MR
H
H
H
H
H
X
X
X
X
X
X
X
X
X
L
L
L
L
(9)
DQM
X
X
X
X
X
X
X
V
X
X
X
X
X
X
X
X
X
X
Code
A
Code
Add.
7
RA
CA
CA
CA
CA
CA
X
X
X
X
X
X
X
X
L
= H
(8)
WORD
X
X
X
X
X
X
X
X
X
X
H
X
X
X
X
X
X
X
L
1940B–FLASH–11/01
VPP
12V
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
WE
H
H
H
X
X
X
X
X
X
X
X
X
L
L
X
X
L
X