cy62158e Cypress Semiconductor Corporation., cy62158e Datasheet

no-image

cy62158e

Manufacturer Part Number
cy62158e
Description
8-mbit 1m X 8 Static Ram
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
cy62158eV30LL-45BVXI
Manufacturer:
Cypress Semiconductor Corp
Quantity:
135
Part Number:
cy62158eV30LL-45BVXI
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
cy62158eV30LL-45BVXI
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Company:
Part Number:
cy62158eV30LL-45BVXI
Quantity:
2 200
Part Number:
cy62158eV30LL-45BVXIT
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
cy62158eV30LL-45ZSXI
Manufacturer:
CYPRESS
Quantity:
60
Part Number:
cy62158eV30LL-45ZSXI
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Features
Functional Description
The CY62158E MoBL
organized as 1024K words by 8 bits. This device features
advanced circuit design to provide ultra low active current. This
Cypress Semiconductor Corporation
Document #: 38-05684 Rev. *D
Very high speed: 45 ns
Ultra low active power
Ultra low standby power
Easy memory expansion with CE
Automatic power down when deselected
CMOS for optimum speed and power
Offered in Pb-free 44-Pin TSOP II package
Logic Block Diagram
Wide voltage range: 4.5V – 5.5V
Typical active current:1.8 mA @ f = 1 MHz
Typical active current: 18 mA @ f = f
Typical standby current: 2 μA
Maximum standby current: 8 μA
®
is a high performance CMOS static RAM
CE 1
CE 2
WE
OE
1
, CE
A 0
A 1
A 2
A 3
A 4
A 5
A 6
A 7
A 8
A 9
A 10
A 11
A 12
max
2
and OE features
198 Champion Court
COLUMN DECODER
DATA IN DRIVERS
1024K x 8
ARRAY
is ideal for providing More Battery Life™ (MoBL
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption. Placing the device into standby mode reduces
power consumption significantly when deselected (CE
CE
To write to the device, take Chip Enables (CE
HIGH) and Write Enable (WE) input LOW. Data on the eight IO
pins (IO
on the address pins (A
To read from the device, take Chip Enables (CE
HIGH) and OE LOW while forcing the WE HIGH. Under these
conditions, the contents of the memory location specified by the
address pins appear on the IO pins.
The eight input and output pins (IO
a high impedance state when the device is deselected (CE
HIGH or CE
write operation is in progress (CE
LOW). See the
of read and write modes.
For best practice recommendations, refer to the Cypress
application note
2
POWER
DOWN
LOW).
0
8-Mbit (1M x 8) Static RAM
through IO
San Jose
2
LOW), the outputs are disabled (OE HIGH), or a
Truth Table
AN1064, SRAM System
7
,
) is then written into the location specified
0
CA 95134-1709
through A
on page 8 for a complete description
CY62158E MoBL
1
19
LOW and CE
0
).
through IO
IO 0
IO 1
IO 2
IO 3
IO 4
IO 5
IO 6
IO 7
Revised June 16, 2008
Guidelines.
1
1
2
7
LOW and CE
) are placed in
LOW and CE
HIGH and WE
408-943-2600
®
) in portable
1
HIGH or
®
2
2
1
[+] Feedback

Related parts for cy62158e

cy62158e Summary of contents

Page 1

... CMOS for optimum speed and power ■ Offered in Pb-free 44-Pin TSOP II package Functional Description ® The CY62158E MoBL is a high performance CMOS static RAM organized as 1024K words by 8 bits. This device features advanced circuit design to provide ultra low active current. This Logic Block Diagram ...

Page 2

... Speed Operating I (ns MHz [2] [2] Max Typ Max 5.5 45 1.8 3 CY62158E MoBL [1] Power Dissipation (mA) CC Standby I SB2 max [2] [2] Typ Max Typ Max 25°C. CC CC(typ) A Page ® (μA) 8 [+] Feedback ...

Page 3

... CC(typ) Test Conditions Still Air, soldered × 4.5 inch, two-layer printed circuit board (min) and 200 μs wait time after spec. Other inputs can be left floating. SB2 CCDR CY62158E MoBL [3, 4] .....................–0. 0.5V CC(max) Ambient Range V CC Temperature Industrial –40°C to +85°C 4.5V – 5.5V ...

Page 4

... Figure 3. Data Retention Waveform DATA RETENTION MODE (min) > 2 CDR (min) > 100 μs or stable at V (min) > 100 μ CY62158E MoBL ALL INPUT PULSES 90% 90% 10% Fall Time = 1 V/ns V Unit Ω Ω Ω V [2] Min Typ Max ...

Page 5

... Test Loads and Waveforms” less than less than t , and t HZCE LZCE HZOE LZOE = V , and All signals must be ACTIVE to initiate a write and any of these signals CY62158E MoBL 45 ns Unit Min Max ...

Page 6

... LOW and CE 1 Document #: 38-05684 Rev. *D [13, 14] Figure 4. Read Cycle No OHA [14, 15] Figure 5. Read Cycle No DOE DATA VALID 50 transition HIGH. 2 ® CY62158E MoBL DATA VALID t HZOE t HZCE HIGH IMPEDANCE 50 Page [+] Feedback ...

Page 7

... During this period, the IOs are in output state. Do not apply input signals. Document #: 38-05684 Rev. *D [12, 16, 17] Figure 6. Write Cycle No SCE PWE t SD VALID DATA [12, 16, 17] Figure 7. Write Cycle No SCE PWE t SD VALID DATA ® CY62158E MoBL Page [+] Feedback ...

Page 8

... PWE t SD VALID DATA Inputs/Outputs High Z Deselect/Power Down High Z Deselect/Power Down Data Out Read High Z Output Disabled Data in Write Package Package Type Diagram 51-85087 44-Pin TSOP II (Pb-free) CY62158E MoBL LZWE Mode Power Standby ( Standby ( Active ( Active (I ...

Page 9

... Package Diagrams Document #: 38-05684 Rev. *D Figure 9. 44-Pin TSOP II, 51-85087 ® CY62158E MoBL 51-85087-*A Page [+] Feedback ...

Page 10

... Document History Page ® Document Title: CY62158E MoBL 8-Mbit ( Static RAM Document Number: 38-05684 REV. ECN NO. Issue Date ** 270350 See ECN *A 291271 See ECN *B 1462592 See ECN VKN/AESA Converted from preliminary to final *C 2428708 See ECN VKN/PYRS Corrected typo in the Ordering Information table ...

Related keywords