psd813f1a STMicroelectronics, psd813f1a Datasheet - Page 62

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psd813f1a

Manufacturer Part Number
psd813f1a
Description
Flash In-system Programmable Isp Peripherals For 8-bit Mcus, 5 V
Manufacturer
STMicroelectronics
Datasheet

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PSD813F1A
Port D – Functionality and Structure
Port D has three I/O pins. See Figure
ure 32., page
dress Out mode, and therefore no Control
Register is required. Port D can be configured to
perform one or more of the following functions:
Figure 31. Port D Structure
62/111
MCU I/O Mode
CPLD Output – External Chip Select (ECS0-
ECS2)
CPLD Input – direct input to the CPLD, no
Input Macrocells (IMC)
Slew rate – pins can be set up for fast slew
rate
63. This port does not support Ad-
ECS [ 2:0 ]
WR
WR
READ MUX
DATA OUT
DIR REG.
D
D
REG.
P
D
B
Q
Q
31
and
Fig-
DATA OUT
DATA IN
Port D pins can be configured in PSDsoft Express
as input pins for other dedicated functions:
CPLD-INPUT
PD0 – ALE, as address strobe input
PD1 – CLKIN, as clock input to the macrocells
flip-flops and APD counter
PD2 – CSI, as active Low chip select input. A
High input will disable the Flash memory,
EEPROM, SRAM and CSIOP.
OUTPUT
OUTPUT
SELECT
MUX
ENABLE PRODUCT
TERM (.OE)
PORT D PIN
AI02889

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