tmp88ch40img TOSHIBA Semiconductor CORPORATION, tmp88ch40img Datasheet - Page 52

• Manufacturer Part Number: tmp88ch40img
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

6.2 Watchdog Timer Control
6. Watchdog Timer (WDT)
6.2.3 Watchdog Timer Disable
6.2.4 Watchdog Timer Interrupt (INTWDT)
Example :Disabling the watchdog timer
Note: If the watchdog timer is disabled during watchdog timer interrupt processing, the watchdog timer interrupt will never be
ister in other procedures causes a malfunction of the microcontroller.
by the binary-counter overflow.
master flag (IMF).
is already accepted, the new watchdog timer interrupt is processed immediately and the previous interrupt is
held pending. Therefore, if watchdog timer interrupts are generated continuously without execution of the
RETN instruction, too many levels of nesting may cause a malfunction of the microcontroller.
To disable the watchdog timer, set the register in accordance with the following procedures. Setting the reg-
Note:While the watchdog timer is disabled, the binary counters of the watchdog timer are cleared.
cleared. Therefore, clear the watchdog timer ( set the clear code (4EH) to WDTCR2 ) before disabling it, or disable the
watchdog timer a sufficient time before it overflows.
When WDTCR1<WDTOUT> is cleared to “0”, a watchdog timer interrupt request (INTWDT) is generated
A watchdog timer interrupt is the non-maskable interrupt which can be accepted regardless of the interrupt
When a watchdog timer interrupt is generated while the other interrupt including a watchdog timer interrupt
To generate a watchdog timer interrupt, set the stack pointer before setting WDTCR1<WDTOUT>.
1. Set the interrupt master flag (IMF) to “0”.
2. Set WDTCR2 to the clear code (4EH).
3. Set WDTCR1<WDTEN> to “0”.
4. Set WDTCR2 to the disable code (B1H).
DI
LD
LDW
EI
Table 6-1 Watchdog Timer Detection Time (Example: fc = 20 MHz)
WDTT
00
01
10
11
(WDTCR2), 04EH
(WDTCR1), 0B101H
DV1CK = 0
419.430 m
104.858 m
26.214 m
Watchdog Timer Detection Time[s]
1.678
Page 44
: IMF
: WDTEN
: IMF
: Clears the binary coutner
NORMAL Mode
←
←
0
1
←
0, WDTCR2
DV1CK = 1
838.861 m
209.715 m
52.429 m
3.355
←
Disable code
TMP88CH40IMG