W83194R-37/-58 Winbond Electronics Corp America, W83194R-37/-58 Datasheet - Page 4

• Manufacturer Part Number: W83194R-37/-58
• Description: 100MHz/133MHz Via MVP3, Via Apollo Pro Clock Gen., 3-DIMM, With S.S.T.
• Manufacturer: Winbond Electronics Corp America

5.0 PIN DESCRIPTION
IN - Input
OUT - Output
I/O - Bi-directional Pin
# - Active Low
* - Internal 250kΩ pull-up
5.1 Crystal I/O
Xin
Xout
5.2 CPU, SDRAM, PCI Clock Outputs
CPUCLK [ 0:3 ]
AGP[ 0:1]
SDRAM11/
CPU_STOP#
SDRAM10/
PCI_STOP#
SDRAM [ 0:9]
PCICLK_F/ *FS1
SYMBOL
SYMBOL
- 4 -
20,21,28,29,31
40,41,43,44
35,37,38
,32,34,
15,47
PIN
PIN
17
18
4
5
7
OUT
OUT
OUT
I/O
I/O
I/O
I/O
I/O
IN
O
Crystal input with internal loading capacitors and
feedback resistors.
Crystal output at 14.318MHz nominally.
Low skew (< 250ps) clock outputs for host
frequencies such as CPU, Chipset and Cache.
Vddq2b is the supply voltage for these outputs.
Accelerate Graphic Port clock outputs
If MODE =1 (default), then this pin is a SDRAM clock
buffered output of the crystal. If MODE = 0 , then this
pin is CPU_STOP# input used in power
management mode for synchronously stopping the all
CPU clocks.
If MODE = 1 (default), then this pin is a SDRAM clock
output. If MODE = 0 , then this pin is PCI_STOP #
and used in power management mode for
synchronously stopping the all PCI clocks.
SDRAM clock outputs which have the same
frequency as CPU clocks.
Latched input for FS1 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
Free running PCI clock during normal operation.
Publication Release Date: Sep 1998
FUNCTION
FUNCTION
Revision 1.0