isppac20 Lattice Semiconductor Corp., isppac20 Datasheet - Page 7

• Manufacturer Part Number: isppac20
• Description: In-system Programmable Analog Circuit
• Manufacturer: Lattice Semiconductor Corp.

DAC Parallel Input Timing Specifications
SPI Connection Diagram
SPI Data Transfer
Notes
1.
2.
3.
4.
Timing Specifications (SPI/Parallel Interface Modes), Continued
SPI data is loaded in TDI, LSB first. If TCK continues to clock after CS goes high, data will continue to be shifted through the shift register,
even though the TDO pin is tristated after CS goes high.
DO
DI
After the eighth clock, the LSB (DO
0
0
–> DI
–> DO
TDO
TCK
TDI
CS
7
represents “data in” from the ispPAC20 TDO pin to the SPI microprocessor input or other digital source.
7
represents “data out” from the SPI microprocessor or other digital source to the TDI input of the ispPAC20.
don’t
care
DI
0
LSB
DO
CS
DAC
D0-D7
0
DI
0
1
) is valid on TDO as long as CS is low.
DO
Represents previous data in shift register
1
DI
tcsw
2
tdacs
DO
valid data
SS
2
DI
3
tdach
DO
3
7
DI
4
DO
4
DI
5
CS
Specifications ispPAC20
DO
5
DI
6
DO
6
DI
7
MSB
DO
7
DO
0
don’t
care