ht82m72e Holtek Semiconductor Inc., ht82m72e Datasheet - Page 22

• Manufacturer Part Number: ht82m72e
• Description: Ht82m72e/ht82m72a -- Rf One Channel Mouse 8-bit Otp Mcu
• Manufacturer: Holtek Semiconductor Inc.

ters the Power Down Mode, the system clock will stop
running but the WDT oscillator continues to free-run and
to keep the watchdog active. However, to preserve
power in certain applications the WDT oscillator can be
disabled via a configuration option.
Power Down Mode and Wake-up
Power Down Mode
All of the Holtek microcontrollers have the ability to enter
a Power Down Mode. When the device enters this
mode, the normal operating current, will be reduced to
an extremely low standby current level. This occurs be-
cause when the device enters the Power Down Mode,
the system oscillator is stopped which reduces the
power consumption to extremely low levels, however,
as the device maintains its present internal condition, it
can be woken up at a later stage and continue running,
without requiring a full reset. This feature is extremely
important in application areas where the microcontroller
must have its power supply constantly maintained to
keep the device in a known condition but where the
power supply capacity is limited such as in battery appli-
cations.
Entering the Power Down Mode
There is only one way for the device to enter the Power
Down Mode and that is to execute the HALT instruc-
tion in the application program. When this instruction is
executed, the following will occur:
Standby Current Considerations
As the main reason for entering the Power Down Mode
is to keep the current consumption of the microcontroller
to as low a value as possible, perhaps only in the order
of several micro-amps, there are other considerations
which must also be taken into account by the circuit de-
signer if the power consumption is to be minimised.
Special attention must be made to the I/O pins on the
device. All high-impedance input pins must be con-
nected to either a fixed high or low level as any floating
input pins could create internal oscillations and result in
increased current consumption. Care must also be
taken with the loads, which are connected to I/O pins,
which are setup as outputs. These should be placed in a
Rev. 1.20
The system oscillator will stop running and the appli-
cation program will stop at the HALT instruction.
The Data Memory contents and registers will maintain
their present condition.
The WDT will be cleared and resume counting if the
WDT clock source is selected to come from the WDT
oscillator. The WDT will stop if its clock source origi-
nates from the system clock.
The I/O ports will maintain their present condition.
In the status register, the Power Down flag, will be set
and the Watchdog time-out flag, TO, will be cleared.
22
condition in which minimum current is drawn or con-
nected only to external circuits that do not draw current,
such as other CMOS inputs.
If the configuration options have enabled the Watchdog
Timer internal oscillator then this will continue to run
when in the Power Down Mode and will thus consume
some power. For power sensitive applications it may be
therefore preferable to use the system clock source for
the Watchdog Timer.
Wake-up
After the system enters the Power Down Mode, it can be
woken up from one of various sources listed as follows:
If the system is woken up by an external reset, the de-
vice will experience a full system reset, however, if the
device is woken up by a WDT overflow, a Watchdog
Timer reset will be initiated. Although both of these
wake-up methods will initiate a reset operation, the ac-
tual source of the wake-up can be determined by exam-
ining the TO and PDF flags. The PDF flag is cleared by a
system power-up or executing the clear Watchdog
Timer instructions and is set when executing the HALT
instruction. The TO flag is set if a WDT time-out occurs,
and causes a wake-up that only resets the Program
Counter and Stack Pointer, the other flags remain in
their original status.
Each pin on Port A or any nibble on the other ports can
be setup via configuration options to permit a negative
transition on the pin to wake-up the system. When a port
pin wake-up occurs, the program will resume execution
at the instruction following the HALT instruction.
If the system is woken up by an interrupt, then two possi-
ble situations may occur. The first is where the interrupt
is disabled or the interrupt is enabled but the stack is full,
in which case the program will resume execution at the
instruction following the HALT instruction. In this situa-
tion, the interrupt will not be immediately serviced, but
will rather be serviced later when the related interrupt is
finally enabled or when a stack level becomes free. The
other situation is where the related interrupt is enabled
and the stack is not full, in which case the regular inter-
rupt response takes place. If an interrupt request flag is
set to ²1² before entering the Power Down Mode, the
wake-up function of the related interrupt will be disabled.
No matter what the source of the wake-up event is, once
a wake-up situation occurs, a time period equal to 1024
system clock periods will be required before normal sys-
tem operation resumes. However, if the wake-up has
originated due to an interrupt, the actual interrupt sub-
routine execution will be delayed by an additional one or
An external reset
An external falling edge on any of the I/O pins
A system interrupt
A WDT overflow
HT82M72E/HT82M72A
May 22, 2008