ht82v842a Holtek Semiconductor Inc., ht82v842a Datasheet - Page 12

• Manufacturer Part Number: ht82v842a
• Description: Ht82v842a -- 10-bit 20msps Ccd Analog Signal Processor
• Manufacturer: Holtek Semiconductor Inc.

AD Conversion Timing (at ADIN (ADC) Input Mode 1 Register D5=1)
These figures are shown when the Mode 1 D8 bit is set to 1 , and an external clock is input to the OUTCK pin. When
setting D8 bit to 0 , the ADCK is used as OUTCK.
Note:
ADCK Clock Waveform
Rev. 1.00
At default condition in ADIN mode, data are sampled at the falling edge of the ADCK clock, and are output at
the rising edge of the OUTCK clock. Set the ADCK polarity register to 1 when the data are sampled and are
output at the falling edge of the ADCK clock.
The diagram on the upper portion of this page shows the default timing and the lower left figure shows the in-
verted timing.
Delay from data sampling to data output
ADCK normal: At Mode 1 register D6=0; 5.5 clk delay
ADCK inversion: At Mode 1 register D6=1; 6.0 clk delay
In ADIN input mode, the above mentioned register setting is available.
At ADIN (PGA) input Mode 1 register D5=0 and D4=1, digital data output is delayed by 2 clks.
ADCK Inversion Chart
ADC Direct Input Chart
12
OUTCK Timing Chart
HT82V842A
January 2, 2006