as7c33256pfs18b ETC-unknow, as7c33256pfs18b Datasheet
as7c33256pfs18b
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as7c33256pfs18b Summary of contents
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... CLK CLK D Q Enable Power delay down register CLK –200 –166 5 6 200 166 3.0 3.5 375 350 130 100 30 30 Alliance Semiconductor AS7C33256PFS18B DDQ 256K × 18 Memory array Input registers CLK 18 DQ [a,b] –133 Units 7.5 133 MHz 4 325 Copyright © ...
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... Mode PL-SCD PL-SCD PL-SCD PL-DCD PL-DCD PL-DCD NTD-PL NTD-PL NTD-PL NTD-FT NTD-FT NTD- Alliance Semiconductor AS7C33256PFS18B Speed 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 6.5/7.5/8.0/10 ns 6.5/7.5/8.0/10 ns 6.5/7.5/8.0/10 ns 200/166/133 MHz 200/166/133 MHz 200/166/133 MHz 6.5/7.5/8.0/10 ns 6.5/7.5/8.0/10 ns 6.5/7.5/8.0/ ...
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... DQb5 DDQ V 21 SSQ DQb6 22 DQb7 23 DQpb SSQ V 27 DDQ 12/10/04; v.1.7 ® TQFP 14 × 20mm Alliance Semiconductor AS7C33256PFS18B DDQ V 76 SSQ NC 75 DQpa 74 DQa7 73 DQa6 SSQ V 70 DDQ DQa5 69 DQa4 68 VSS ...
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... WE signals are sampled on the clock edge that samples ADSC LOW (and ADSP HIGH). • Master chip select CE0 blocks ADSP, but not ADSC. The AS7C33256PFS18B operates from a 3.3V supply. I/Os use a separate power supply that can operate at 2.5V or 3.3V. These devices are available in a 100-pin 14×20 mm TQFP package. ...
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... High. Snooze. Places device in low power mode; data is retained. Connect to GND if unused. No connect is guaranteed after the time t is met. After entering SNOOZE MODE, all inputs except ZZ ZZI Alliance Semiconductor AS7C33256PFS18B or left floating, device follows interleaved . The duration of SB2 ...
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... Address Address Address Address Alliance Semiconductor AS7C33256PFS18B ...
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... H H Current External Next Next Current Current Alliance Semiconductor AS7C33256PFS18B CLK Operation Deselect Hi− Deselect Hi− Deselect Hi− Deselect Hi− Deselect Hi− Begin read Begin read Hi−Z ...
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... Symbol Min Nominal V 3.135 3 3.135 3.3 DDQ Vss 0 0 Symbol Min Nominal V 3.135 3 2.375 2.5 DDQ Vss 0 0 Alliance Semiconductor AS7C33256PFS18B Min Max Unit –0.5 +4.6 –0 0.5 DD –0 0.5 DDQ – 1.8 – –65 +150 –65 +135 Max Unit 3.465 V 3.465 V 0 ...
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... Deselected < Max IL Deselected < 0.2V, ≤ 0.2V or ≥ V all V – 0. ≥ V Deselected – 0.2V, Max DD ≤ ≥ V all Alliance Semiconductor AS7C33256PFS18B Min Max Unit -2 2 µA < µA DDQ +0.3 DDQ -0.3** 0.8 V -0.5** ...
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... ADSPS t 1.5 1.4 – ADSCS t 0.5 0.4 – ADVH t 0.5 0.4 – ADSPH t 0.5 0.4 – ADSCH Conditions Symbol ZZ > SB2 t PDS t PUS t ZZI t RZZI Alliance Semiconductor AS7C33256PFS18B –133 Unit Notes Max Min Max 166 – 133 MHz – 7.5 – ns 3.5 – 4.0 ns 3.5 – 4.0 ns – 0 – ns 2,3,4 – 1.5 – ns – 0 – ns 2,3,4 3 ...
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... ADV inserts wait states HZOE t OH Q(A2) Q(A2Ý01) Q(A2Ý10) Burst Burst Suspend Burst Read Read Read Read Q(A 2Ý01 ) Q(A 2Ý10 ) Q(A 2Ý10 ) Q(A 2Ý11 ) Alliance Semiconductor AS7C33256PFS18B Undefined t HZC Q(A2Ý11) Q(A3) Q(A3Ý01) Q(A3Ý10) Read Burst Burst Burst Q(A3) Read Read Read DSEL Q(A 3Ý01 ) Q(A 3Ý10 ) Q(A 3Ý ...
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... CL ADSC LOADS NEW ADDRESS A2 ADV SUSPENDS BURST D(A2) D(A2Ý01) D(A2Ý01) D(A2Ý10) ADV Suspend Read Suspend Burst Write Q(A2) Write Write D D(A 2Ý01 ) D(A 2Ý01 ) D(A 2Ý10 ) Alliance Semiconductor AS7C33256PFS18B t t ADSCS ADSCH ADVH ADVS D(A2Ý11) D(A3) D(A3Ý01) D(A3Ý10) ADV ADV ...
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... ADVH ADVS D(A2 HZOE LZOE Q(A1) Suspend Read Suspend Read Read Q(A2) Write Q(A3) Q(A1) D Alliance Semiconductor AS7C33256PFS18B Q(A3) Q(A3Ý01) Q(A3Ý10) Q(A3Ý11) ADV ADV ADV Burst Burst Burst Read Read Read Q(A 3Ý01 ) Q(A 3Ý10 ) Q(A 3Ý ...
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... CSS CSH CE0,CE2 CE1 ADV LZOE Q(A1) Dout Din READ READ Q(A1) Q(A2) 12/10/04; v.1.7 ® t CYC HZOE Q(A2) Q(A3) Q(A4 D(A5) D(A6) READ READ WRITE Q(A3) Q(A4) D(A5) Alliance Semiconductor AS7C33256PFS18B LZOE Q(A8 D(A7) READ WRITE WRITE READ Q(A9) D(A7) D(A6) Q(A8 Q(A9) ...
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... ZZ ZZ Setup Cycle I supply S READ USPEND READ Q(A1) Q(A1) 12/10/04; v.1.7 ® HZC t PUS t PDS ZZ Recovery Cycle t ZZI t RZZI I SB2 Sleep State Alliance Semiconductor AS7C33256PFS18B t CYC D(A2) t HZOE D(A2(Ý01)) Normal Operation Mode READ USPEND ON Q(A2) WRITE TINUE WRITE D(A2) D(A2 Ý ...
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... V = 1.5V L OUT for 3.3V I/ DDQ for 2.5V I/O Figure B: Output load (A) at any given temperature and voltage. LZC Alliance Semiconductor AS7C33256PFS18B Thevenin equivalent: +3.3V for 3.3V I/O; /+2.5V for 2.5V I/O 319Ω / 1667Ω D OUT 5 pF* 353Ω / 1538Ω /2 GND *including scope and jig capacitance Figure C: Output load (B) ...
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... Package Dimensions 100-pin quad flat pack (TQFP TQFP Min Max A1 0.05 0.15 A2 1.35 1.45 b 0.22 0.38 c 0.09 0.20 D 13.90 14.10 E 19.90 20.10 e 0.65 nominal Hd 15.85 16.15 He 21.80 22.20 L 0.45 0.75 L1 1.00 nominal α 0° 7° Dimensions in millimeters 12/10/04; v.1.7 ® Alliance Semiconductor AS7C33256PFS18B α ...
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... Ordering information Package Width TQFP x18 AS7C33256PFS18B-200TQC AS7C33256PFS18B-166TQC AS7C33256PFS18B-133TQC TQFP x18 AS7C33256PFS18B-200TQI Note: Add suffix ‘N’ to the above part numbers for lead free parts (Ex Part numbering guide AS7C 33 256 Alliance Semiconductor SRAM Prefix 2.Operating voltage 3.3V 3.Organization: 256 = 256K 4 ...
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... Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. AS7C33256PFS18B ® Copyright © Alliance Semiconductor All Rights Reserved Part Number: AS7C33256PFS18B Document Version: v.1.7 ...