ml7012-04 Oki Optical Components, ml7012-04 Datasheet - Page 4

• Manufacturer Part Number: ml7012-04
• Description: 2400 Single Chip Full Duplex Data Modem With Protocol
• Manufacturer: Oki Optical Components

PIN DESCRIPTIONS
System & Clock
V.24 Serial Interface
1 Semiconductor
PDN/RST
Symbol
Symbol
OSCO
OSC1
DCD
SRD
DSR
DTR
STD
RTS
CTS
CI
I/O
I/O
O
O
O
O
O
O
I
I
I
I
I
Pins to connect crystal, resistors and capacitors for the master clock oscillation. When
supplying the master clock from an external source, use OSC0 and leave OSC1 open.
Master clock frequency = 11.0592 MHz. When PDN/RST = “0”, OSC1 = “1”.
Power-down and reset control input pin. When PDN/RST = “0”, this device is in the
power-down state and internal circuits are reset.
“0”: Power-down state, “1”: Normal operation
After power-on, use this pin after setting it to “0” for 1 µs or more to reset internal
circuits. Waiting for 230 ms or more is required until restarting a normal operation after
reset release.
the power-down current may increase. To avoid this, input “1” to this pin and start
oscillation or input the master clock to operate the internal circuits, and then set it to
“0”
Send data input pin
Receive data output pin
When PDN/RST = “0”, SRD outputs “1”.
RTS (Request to Send) signal input pin
CTS (Clear to Send) signal output pin
When PDN/RST = “0”, CTS outputs “1”.
DCD (Data Carrier Detect) signal output pin
When PDN/RST = “0”, DCD outputs “1”.
DSR (Data Set Ready) signal output pin
When PDN/RST = “0”, DSR outputs “1”.
DTR (Data Terminal Ready) signal input pin
CI (Calling Indicator) signal output pin (*2)
When PDN/RST = “0”, CI outputs “1”.
If this pin remains at “0” after power-on, the internal circuits become undefined and
Description
Description
0: On, 1: Off
0: Space, 1: Mark
0: Space, 1: Mark
0: On, 1: Off
0: On, 1: Off
0: On, 1: Off
0: On, 1: Off
0: On, 1: Off
FEDL 7012-04-01
ML7012-04
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