mt8885an1 Zarlink Semiconductor, mt8885an1 Datasheet - Page 2

• Manufacturer Part Number: mt8885an1
• Description: Integrated Dtmf Transceiver With Power-down And Adaptive Micro Interface
• Manufacturer: Zarlink Semiconductor

The MT8885 provides enhanced power-down features. The transmitter and receiver may independently be
powered down via register control.
Pin Description
24
10
11
12
13
14
1
2
3
4
5
6
7
Pin #
28
12
13
14
15
17
1
2
4
6
7
8
9
R/W/WR
OSC1
OSC2
TONE
VRef
VSS
IN+
R/W(WR) (Motorola) Read/Write or (Intel) Write microprocessor input. CMOS compatible.
GS
NC
NC
CS
IN-
DS (RD)
Name
OSC1
OSC2
TONE
RS0
V
IN+
V
GS
CS
IN-
Ref
SS
24 PIN DIP/SSOP
10
11
12
1
2
3
4
5
6
7
8
9
Non-inverting op-amp input.
Inverting op-amp input.
Gain Select. Gives access to output of front end differential amplifier for connection
of feedback resistor.
Reference Voltage output (V
Ground (0 V).
Oscillator input. This pin can also be driven directly by an external clock.
Oscillator output. A 3.579545 MHz crystal connected between OSC1 and OSC2
completes the internal oscillator circuit. Leave open circuit when OSC1 is driven
externally.
Output from internal DTMF transmitter.
Chip Select input must be gated externally by either address strobe (AS), valid
memory address (VMA) or address latch enable (ALE) signal, depending on
processor used. See Figure 12. Must not be tied low. CMOS compatible.
Register Select input. Refer to Table 3 for bit interpretation. CMOS compatible.
(Motorola) Data Strobe or (Intel) Read microprocessor input. Activity on this input is
only required when the device is being accessed. CMOS compatible.
24
23
22
21
20
19
18
17
16
15
14
13
VDD
St/GT
ESt
D3
D2
D1
D0
NC
PWDN
IRQ/CP
DS/RD
RS0
Figure 2 - Pin Connections
Zarlink Semiconductor Inc.
MT8885
2
DD
/2).
Description
OSC1
OSC2
VRef
VSS
NC
NC
NC
5
6
7
8
9
10
11
28 PIN PLCC
•
25
24
23
22
21
20
19
NC
D3
D2
D1
D0
NC
PWDN
Data Sheet