le79234-sw Zarlink Semiconductor, le79234-sw Datasheet - Page 11

• Manufacturer Part Number: le79234-sw
• Description: Voiceedgetm Control Processor Software Package Next Generation Carrier Chipset Ngcc
• Manufacturer: Zarlink Semiconductor

1.8
The hardware consists of the Le79234 NGVCP, the Le79238 NGSLAC and the Le79271 NGSLIC Voice
Termination Devices.
The NGVCP is a digital signal processor platform that performs all of the management required for controlling
multiple SLAC devices, as well as all the sequencing necessary for advanced line test functionality. To the host
processor, the NGVCP looks like a single 32-line voice controller. The host communicates directly with the NGVCP
device(s) through the HBI and does not communicate directly with any of the individual SLAC devices controlled by
the NGVCP. The host can choose to poll the NGVCP or service it by waiting for an interrupt to indicate that
servicing is needed. Multiple NGVCP devices can be connected to the same host.
The NGVCP communicates with the SLAC device(s) through a SPI port. The Le79234 NGVCP has 8 General
Purpose I/O pins of which 4 are used as chip selects and 4 are used as interrupts.
The API line mapping to the SPI bus is fixed as shown in
these are numbered from 0 to 31 (boardLineID). At system initialization, a software line object needs to be created
for each individual line and contains all parameters associated with that line (VpMakeLineObject). A line context
pointer to this line object is also created. After the system initialization is completed, all VP-API-II functions use the
line context pointer as a channel identifier such that the host application code needs not be concerned with the
NGVCP channel ID.
1.9
Zarlink specifies standard topologies that defines the hardware test architecture. This architecture defines the
termination type for the VoicePath™ Test Library software. The VoicePath™ software for NGCC currently supports
two general hardware topologies.
Configuration C
Configuration D
APIchannelI
Topologies
16 to 23
24 to 31
Hardware
8 to 15
0 to 7
Hardware Architecture
D
Hardware Topologies
Table 2 - VoicePath™ Test Library Supported Termination Types
boardLineID
(LineCtx)
VP_TERM_FXS_GENERIC
VP_TERM_FXS_TI
16 to 23
24 to 31
8 to 15
0 to 7
Software Termination
Table 1 - NGVCP GPIO Chip Select and Interrupt Assignments
Types
SPI Port
#
1
Table 2
SLAC_I
lists the hardware topologies and the supported termination types.
NGVCP
NGVCP
D
0
1
2
3
Device
Zarlink Semiconductor Inc.
Le79234-SW
CS0
CS1
CS2
CS3
11
Generic FXS termination
FXS termination with Test-In relay
Table
Chip Select
GPIO
16
17
18
19
1. There are 32 channels for the Le79234 device,
TQFP Pin
GPIO
36
12
Description
#
7
8
INT0
INT1
INT2
INT3
GPIO
Interrupt
0
1
2
3
TQFP Pin
Data Sheet
GPIO
76
77
78
79
#