zl30109 Zarlink Semiconductor, zl30109 Datasheet - Page 19

• Manufacturer Part Number: zl30109
• Description: Ds1/e1 System Synchronizer With 19.44 Mhz Output
• Manufacturer: Zarlink Semiconductor

4.4.2
Holdover mode is typically used for short durations while network synchronization is temporarily disrupted.
In Holdover mode, the ZL30109 provides timing and synchronization signals, which are not locked to an external
reference signal, but are based on storage techniques. The storage value is determined while the device is in
Normal Mode and locked to an external reference signal.
When in Normal mode, and locked to the input reference signal, a numerical value corresponding to the ZL30109
output reference frequency is stored alternately in two memory locations every 26 ms. When the device is switched
into Holdover mode, the value in memory from between 26 ms and 52 ms is used to set the output frequency of the
device. The frequency accuracy of Holdover mode is 0.15 ppm.
Two factors affect the accuracy of Holdover mode. One is drift on the master clock while in Holdover mode, drift on
the master clock directly affects the Holdover mode accuracy. Note that the absolute master clock (OSCi) accuracy
does not affect Holdover accuracy, only the change in OSCi accuracy while in Holdover mode. For example, a
±
temperature, while the ZL30109 is in Holdover mode may result in an additional offset (over the 0.15 ppm) in
frequency accuracy of
the accuracy is large jitter on the reference input prior to the mode switch.
4.4.3
Normal mode is typically used when a system clock source, synchronized to the network is required. In Normal
mode, the ZL30109 provides timing and frame synchronization signals, which are synchronized to one of the two
reference inputs (REF0 or REF1). The input reference signal may have a nominal frequency of 2 kHz, 8 kHz,
1.544 MHz, 2.048 MHz, 8.192 MHz, 16.384 MHz or 19.44 MHz. The frequency of the reference inputs are
automatically detected by the reference monitors.
When the ZL30109 comes out of RESET while Normal mode is selected by its MODE_SEL pins then it will initially
go into Holdover mode and generate clocks with the accuracy of its free running local oscillator (see Figure 10). If
the ZL30109 determines that its selected reference is disrupted (see Figure 3), it will remain in Holdover until the
selected reference is no longer disrupted or the external controller selects another reference that is not disrupted. If
the ZL30109 determines that its selected reference is not disrupted (see Figure 3) then the state machine will cause
the DPLL to recover from Holdover via one of two paths depending on the logic level at the HMS pin. If HMS=0 then
the ZL30109 will transition directly to Normal mode and it will align its output signals with its selected input
reference (see Figure 8). If HMS=1 then the ZL30109 will transition to Normal mode via the TIE correction state and
the phase difference between the output signals and the selected input reference will be maintained.
When the ZL30109 is operating in Normal mode, if it determines that its selected reference is disrupted (Figure 3)
then its state machine will cause it to automatically go to Holdover mode. When the ZL30109 determines that its
selected reference is not disrupted then the state machine will cause the DPLL to recover from Holdover via one of
two paths depending on the logic level at the HMS pin (see Figure 10). If HMS=0 then the ZL30109 will transition
directly to Normal mode and it will align its output signals with its input reference (see Figure 8). If HMS=1 then the
ZL30109 will transition to Normal mode via the TIE correction state and the phase difference between the output
signals and the input reference will be maintained.
If the reference selection changes because the value of the REF_SEL1:0 pins changes, the ZL30109 goes into
Holdover mode and returns to Normal mode through the TIE correction state regardless of the logic value on HMS
pin.
The ZL30109 provides a wide bandwidth loop filter setting (BW_SEL=1), which enables the PLL to lock to an
incoming reference in approximately 1 s.
32 ppm master clock may have a temperature coefficient of
Holdover Mode
Normal Mode
±
1 ppm. Which is much greater than the 0.15 ppm of the ZL30109. The other factor affecting
Zarlink Semiconductor Inc.
ZL30109
19
±
0.1 ppm per °C. So a
±
10 °C change in
Data Sheet