89hpes32h8 Integrated Device Technology, 89hpes32h8 Datasheet - Page 3

• Manufacturer Part Number: 89hpes32h8
• Description: 32-lane, 8-port Pcie System Interconnect Switch
• Manufacturer: Integrated Device Technology

3(a), the master and slave SMBuses are tied together and the PES32H8 acts both as a SMBus master as well as a SMBus slave on this bus. This
requires that the SMBus master or processor that has access to PES32H8 registers supports SMBus arbitration. In some systems, this SMBus master
interface may be implemented using general purpose I/O pins on a processor or micro controller, and may not support SMBus arbitration. To support
these systems, the PES32H8 may be configured to operate in a split configuration as shown in Figure 3(b).
The PES32H8 supports reading and writing of the serial EEPROM on the master SMBus via the slave SMBus, allowing in system programming of the
serial EEPROM.
Hot-Plug Interface
the PES32H8 utilizes an external I/O expander, such as that used on PC motherboards, connected to the SMBus master interface. Following reset
and configuration, whenever the state of a Hot-Plug output needs to be modified, the PES32H8 generates an SMBus transaction to the I/O expander
with the new value of all of the outputs. Whenever a Hot-Plug input changes, the I/O expander generates an interrupt which is received on the IOEX-
PINTN input pin (alternate function of GPIO) of the PES32H8. In response to an I/O expander interrupt, the PES32H8 generates an SMBus transac-
tion to read the state of all of the Hot-Plug inputs from the I/O expander.
General Purpose Input/Output
outputs, or alternate functions. Some GPIO pins are shared with other on-chip functions. These alternate functions may be enabled via software,
SMBus slave interface, or serial configuration EEPROM.
IDT 89HPES32H8 Data Sheet
As shown in Figure 3, the master and slave SMBuses may be used in a unified or split configuration. In the unified configuration, shown in Figure
In the split configuration, the master and slave SMBuses operate as two independent buses and thus multi-master arbitration is never required.
The PES32H8 supports PCI Express Hot-Plug on each downstream port (ports 1 through 7). To reduce the number of pins required on the device,
The PES32H8 provides 32 General Purpose I/O (GPIO) pins that may be individually configured as general purpose inputs, general purpose
PES32H8
(a) Unified Configuration and Management Bus
MSMBCLK
SSMBCLK
MSMBDAT
SSMBDAT
Processor
SMBus
Master
Bit
Table 1 Master and Slave SMBus Address Assignment
1
2
3
4
5
6
7
EEPROM
Figure 3 SMBus Interface Configuration Examples
Serial
...
Devices
SMBus
Other
SSMBADDR[1]
SSMBADDR[2]
SSMBADDR[3]
SSMBADDR[5]
Address
SMBus
Slave
3 of 40
0
1
1
(b) Split Configuration and Management Buses
PES32H8
MSMBADDR[1]
MSMBADDR[2]
MSMBADDR[3]
MSMBADDR[4]
Address
Master
SMBus
MSMBCLK
MSMBDAT
SSMBCLK
SSMBDAT
1
0
1
Processor
SMBus
Master
EEPROM
Serial
...
Devices
SMBus
Other
April 16, 2008