89hpes32h8 Integrated Device Technology, 89hpes32h8 Datasheet - Page 5

• Manufacturer Part Number: 89hpes32h8
• Description: 32-lane, 8-port Pcie System Interconnect Switch
• Manufacturer: Integrated Device Technology

IDT 89HPES32H8 Data Sheet
SSMBADDR[5,3:1]
PEREFCLKP[3:0]
PEREFCLKN[3:0]
MSMBADDR[4:1]
PE7TN[3:0]
PE7TP[3:0]
MSMBDAT
MSMBCLK
SSMBDAT
REFCLKM
SSMBCLK
Signal
Signal
Signal
GPIO[0]
GPIO[1]
GPIO[2]
GPIO[3]
GPIO[4]
GPIO[5]
Type
Type
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
I
I
I
Table 2 PCI Express Interface Pins (Part 2 of 2)
Table 4 General Purpose I/O Pins (Part 1 of 3)
PCI Express Port 7 Serial Data Transmit. Differential PCI Express transmit pairs for
port 7. When port 6 is merged with port 7, these signals become port 6 transmit pairs
for lanes 4 through 7.
PCI Express Reference Clock Mode Select. This signal selects the frequency of the
reference clock input.
0x0 - 100 MHz
0x1 - 125 MHz
PCI Express Reference Clock. Differential reference clock pair input. This clock is
used as the reference clock by on-chip PLLs to generate the clocks required for the
system logic and on-chip SerDes. The frequency of the differential reference clock is
determined by the REFCLKM signal.
Master SMBus Address. These pins determine the SMBus address of the serial
EEPROM from which configuration information is loaded.
Master SMBus Clock. This bidirectional signal is used to synchronize transfers on the
master SMBus. It is active and generating the clock only when the EEPROM or I/O
Expanders are being accessed.
Master SMBus Data. This bidirectional signal is used for data on the master SMBus.
Slave SMBus Address. These pins determine the SMBus address to which the slave
SMBus interface responds.
Slave SMBus Clock. This bidirectional signal is used to synchronize transfers on the
slave SMBus.
Slave SMBus Data. This bidirectional signal is used for data on the slave SMBus.
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: GPEN
Alternate function pin type: Output
Alternate function: General Purpose Event (GPE) output
Table 3 SMBus Interface Pins
5 of 40
Name/Description
Name/Description
Name/Description
April 16, 2008