am42dl6404g Meet Spansion Inc., am42dl6404g Datasheet - Page 12

• Manufacturer Part Number: am42dl6404g
• Description: 64 Mbit 8 M ? 8-bit/4 M ? 16-bit Cmos And 4 Mbit 256 K ? 16-bit Static Ram Preliminary
• Manufacturer: Meet Spansion Inc.

Legend: L = Logic Low = V
Address In (for Flash Byte Mode, DQ15 = A-1), D
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE#f = V
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = V
5. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector Block Protection
6. If WP#/ACC = V
March 20, 2002
Operation
(Notes 1, 2)
Read from Flash
Write to Flash
Standby
Output Disable
Flash Hardware
Reset
Sector Protect
(Note 5)
Sector Unprotect
(Note 5)
Temporary Sector
Unprotect
Read from SRAM
Write to SRAM
If WP#/ACC = V
and Unprotection” section.
whether they were last protected or unprotected using the method described in “Sector/Sector Block Protection and Unprotection”. If WP#/ACC =
V
HH,
all sectors will be unprotected.
IL
ACC
IL
, the boot sectors will be protected. If WP#/ACC = V
, the two outermost boot sectors remain protected. If WP#/ACC = V
V
0.3 V
CE#f
CC
(9V), the program time will be reduced by 40%.
X
X
H
H
L
L
L
L
L
IL
, CE1#s = V
IL
, H = Logic High = V
Table 2. Device Bus Operations—Flash Byte Mode, CIOf = V
CE1#s
H
H
H
H
H
H
H
X
X
X
L
X
X
X
X
L
L
IL
and CE2s = V
CE2s
H
H
H
X
L
X
L
X
L
X
L
X
L
X
L
L
x
OE# WE#
IH
IN
H
H
H
H
L
X
X
X
L
X
, V
= Data In, D
ID
P R E L I M I N A R Y
IH
= 11.5–12.5 V, V
at the same time.
H
H
H
L
X
X
L
L
X
L
Am42DL6404G
SADD, A6
SADD, A6
= L, A1 =
H, A0 = L
= L, A1 =
H, A0 = L
OUT
Addr.
A
A
A
A
A
X
X
X
IN
IN
IN
IN
IN
= Data Out
IH
HH
the boot sectors protection will be removed.
(Note 3)
= 9.0 ± 0.5 V, X = Don’t Care, SADD = Flash Sector Address, A
LB#s
X
X
X
X
X
X
X
X
H
H
L
L
L
L
L
(Note 3)
IH
UB#s
, the two outermost boot sector protection depends on
H
H
X
X
X
X
L
X
X
X
X
L
L
L
L
RESET#
V
0.3 V
V
V
V
CC
H
H
H
H
H
L
ID
ID
ID
WP#/ACC
(Note 4)
(Note 6)
(Note 6)
(Note 3)
SS
L/H
L/H
L/H
L/H
H
X
X
High-Z
High-Z
High-Z
High-Z
High-Z
DQ7–
DQ0
D
D
D
D
D
D
D
D
D
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
DQ15–
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
D
D
DQ8
D
D
X
X
OUT
OUT
IN
IN
IN
11
=