th50vsf2580 TOSHIBA Semiconductor CORPORATION, th50vsf2580 Datasheet
th50vsf2580
Related parts for th50vsf2580
th50vsf2580 Summary of contents
Page 1
... The CIOS and CIOF inputs can be used to select the optimal memory configuration. The power supply for the TH50VSF2580/2581AASB can range from 2 3.6 V. The TH50VSF2580/2581AASB can perform simultaneous read/write operations on its flash memory and is available in a 69-pin BGA package, making it suitable for a variety of applications ...
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... A16 NC DQ4 DQ13 DQ15 CIOF V DQ12 DQ7 V CCs SS CIOS DQ5 DQ14 A11 CE2S A20 A13 A16 A21 A9 A14 NC A10 A15 NC NC DQ6 A12S A17 NC DQ4 DU A12F CIOF V DU DQ7 V CCs SS CIOS DQ5 TH50VSF2580/2581AASB 000707EBA2 2001-10-26 2/50 ...
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... Word Mode is selected for both SRAM and flash memory and CE2S = V at the same time TH50VSF2580/2581AASB DQ0~DQ15 (DQ0~DQ7) DQ0~DQ15 DQ0~DQ15 (DQ0~DQ7 /ACC DQ0~DQ7 DQ8~DQ15 OUT OUT OUT ...
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... ID CODE TABLE CODE TYPE Manufacturer Code TH50VSF2580AASB Device Code TH50VSF2581AASB Verify Block Protect Notes (1) DQ8~DQ15 are Hi-Z in Byte mode (2) BA: Block Address (3) 0001H - Protected Block 0000H - Unprotected Block TH50VSF2580/2581AASB A20~A12 ( (1) A0 ...
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... IA: Bank Address and ID Read Address (A6, A1, A0) Bank Address = A20~A15 Manufacturer Code = ( Device Code = ( (5) ID: ID Data 0098H - Manufacturer Code 009AH - Device Code (TH50VSF2580AASB) 009CH - Device Code (TH50VSF2581AASB) 0001H - Protected Block SECOND BUS THIRD BUS FOURTH BUS WRITE CYCLE ...
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... BLOCK ERASE ADDRESS TABLES (1) TH50VSF2580AASB (top boot block) BANK BLOCK BANK ADDRESS # # A20 A19 A18 A17 A16 A15 A14 A13 A12 BA0 L L BA1 L L BA2 L L BA3 L L BK0 BA4 L L BA5 L L BA6 L L BA7 L L BA8 L L BA9 ...
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... H L BK6 BA52 BA53 BA54 BA55 BA56 BA57 BA58 BK7 BA59 BA60 BA61 BA62 TH50VSF2580/2581AASB BYTE MODE 200000H~20FFFFH * * * 210000H~21FFFFH * * * 220000H~22FFFFH * * * 230000H~23FFFFH * * * 240000H~24FFFFH 250000H~25FFFFH ...
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... A20 A19 A18 A17 A16 A15 A14 A13 A12 BA63 BA64 BA65 BA66 BK8 BA67 BA68 BA69 BA70 TH50VSF2580/2581AASB BYTE MODE 3F0000H~3F1FFFH 3F2000H~3F3FFFH 3F4000H~3F5FFFH 3F6000H~3F7FFFH ...
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... L H BA23 BA24 BA25 BA26 BK3 BA27 BA28 BA29 BA30 TH50VSF2580/2581AASB BLOCK ADDRESS BYTE MODE 000000H~001FFFH 002000H~003FFFH 004000H~005FFFH 006000H~007FFFH ...
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... BA52 BA53 BA54 BA55 BA56 BA57 BA58 BK7 BA59 BA60 BA61 BA62 TH50VSF2580/2581AASB BYTE MODE 180000H~18FFFFH * * * 190000H~19FFFFH * * * 1A0000H~1AFFFFH * * * 1B0000H~1BFFFFH * * * 1C0000H~1CFFFFH 1D0000H~1DFFFFH ...
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... BANK ADDRESS # # A20 A19 A18 A17 A16 A15 A14 A13 A12 BA63 BA64 BA65 BA66 BK8 BA67 BA68 BA69 BA70 TH50VSF2580/2581AASB BYTE MODE 380000H~38FFFFH * * * 390000H~39FFFFH * * * 3A0000H~3AFFFFH * * * 3B0000H~3BFFFFH * * * 3C0000H~3CFFFFH ...
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... BLOCK SIZE TABLE (1) TH50VSF2580AASB (top boot block) BLOCK SIZE BLOCK # BYTE MODE WORD MODE BA0~BA7 64 Kbytes 32 Kwords BA8~BA15 64 Kbytes 32 Kwords BA16~BA23 64 Kbytes 32 Kwords BA24~BA31 64 Kbytes 32 Kwords BA32~BA39 64 Kbytes 32 Kwords BA40~BA47 64 Kbytes 32 Kwords BA48~BA55 64 Kbytes 32 Kwords BA56~BA62 64 Kbytes 32 Kwords BA63~BA70 8 Kbytes (2) TH50VSF2581AASB (bottom boot block) ...
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... Output when the block address selected for Auto Block Erase is specified and data is read from there. During Auto Chip Erase, all blocks are selected. (3) Output when a block address not selected for Auto Block Erase of same bank as selected block is specified and data is read from there. TH50VSF2580/2581AASB −0.5~V (2) DQ7 ...
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... V for pulse width ≤ CAPACITANCE ( 25° MHz) SYMBOL PARAMETER C Input Capacitance IN C Output Capacitance OUT Note: These parameters are sampled periodically and are not tested for every device. TH50VSF2580/2581AASB ( -40°~85°C) MIN TYP. 2.7 2.2 (1) −0.3 1.5 ...
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... I ACC WP /ACC (1) If the address remains unchanged for 150 ns, the device will enter Automatic Sleep Mode. (2) In Standby Mode, with ≥ V CCs CIOS ≥ V − 0 CIOS ≤ 0.2 V. CCs TH50VSF2580/2581AASB / 2.7 V~3.6 V) CCs CCf CONDITIONS V − 0 CCs ...
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... Data Set-up Time DS t Data Hold Time DH AC TEST CONDITIONS PARAMETER Input Pulse Level Input Pulse Rise and Fall Time (10%~90%) Timing Measurement Reference Level (input) Timing Measurement Reference Level (output) Output Load TH50VSF2580/2581AASB = = = = 2.7 V~3.6 V) CCs PARAMETER PARAMETER C L MIN MAX UNIT 90 ...
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... PPLH PROGRAM AND ERASE CHARACTERISTICS SYMBOL Auto-Program Time (Byte Mode) t PPW Auto-Program Time (Word Mode) t Auto Chip Erase Time PCEW t Auto Block Erase Time PBEW t Erase/Program Cycle EW *: typ. TH50VSF2580/2581AASB PARAMETER PARAMETER PARAMETER MIN MAX UNIT 90 ns ...
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... CEBTS t Program Suspend Command to Suspend Mode SUSP t Program Resume Command to Program Mode RESP t Erase Suspend Command to Suspend Mode SUSE t Erase Resume Command to Erase Mode RESE TH50VSF2580/2581AASB PARAMETER ( WE Control Control Control) ( CEF Control) ( CEF Control) ( CEF Control) Delay MIN MAX UNIT 120 ns ...
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... The TH50VSF2580/2581AASB has a total of nine banks: 1 bank of 0.5 Mbits, 1 bank of 3.5 Mbits and 7 banks of 4 Mbits. Banks can be switched between using the bank addresses (A20~A15). For a description of bank blocks and addresses, please refer to the Block Address Table and Block Size Table ...
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... Output Disable Mode Inputting disables output from the device and sets DQ to High-Impedance. IH TH50VSF2580/2581AASB ± 0 CEF and RESET . The device will enter Standby DD ). However, if the device is in the process CCS1 ± 0 RESET . The device will enter Standby Mode and the SS ) ...
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... Read Mode. BYTE /Word Mode CIOF is used select Word Mode (16 bits) or Byte Mode (8 bits) for the TH50VSF2580/2581AASB input to CIOF, the device will operate in Word Mode. Read data or write commands using DQ0~DQ15. When V is input to CIOF, read data or write commands using DQ0~DQ7. A12F is used as the lowest address. ...
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... Auto-Program Mode The TH50VSF2580/2581AASB can be programmed in either byte or word units. Auto-Program Mode is set using the Program command. The program address is latched on the falling edge of the WE signal and data is latched on the rising edge of the fourth Bus Write cycle (with WE control). Auto programming starts on the rising edge of the WE signal in the fourth Bus Write cycle ...
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... In this case it cannot be ascertained which block the failure occurred in. Either abandon use of the device altogether, or perform a Block Erase on each block, identify the failed block, and stop using it. The host processor must take measures to prevent subsequent use of the failed block. TH50VSF2580/2581AASB must not be released. ACC ...
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... Erase Hold Time, the device will return to the state it was in at the start of the Erase Hold Time. At this time more blocks can be specified for erasing Erase Resume command is input during an Auto Block Erase, Erase resumes. At this time toggle output of DQ6 resumes and 0 is output TH50VSF2580/2581AASB . The SUSE 2001-10-26 24/50 ...
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... The target blocks are the two pairs of boot blocks. The top boot blocks are BA69 and BA70; the bottom boot blocks are BA0 and BA1. Inputting V necessary to protect these blocks, the ordinary Block Protection Mode must be used. TH50VSF2580/2581AASB and are input. At this time, the device writes to the block ...
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... Hidden ROM Area The TH50VSF2580/2581AASB features a 64-Kbyte hidden ROM area which is separate from the memory cells. The area consists of one block. Data Read, Write and Protect can be performed on this block. Because Protect cannot be released, once the block is protected, data in the block cannot be overwritten. ...
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... TH50VSF2580/2581AASB DESCRIPTION ASCII string “QRY” Primary OEM command set 2: AMD/FJ standard type Address for primary extended table Alternate OEM command set 0: none exists Address for alternate OEM extended table V (min) (Write/Erase) ...
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... Block Protect/Unprotect scheme Simultaneous operation 0: Not supported 1: Supported Burst Mode 0: Not supported Page Mode 0: Not supported V (min) voltage ACC DQ7~DQ4 DQ3~DQ0: 100 mV V (max) voltage ACC DQ7~DQ4 DQ3~DQ0: 100 mV Top/Bottom Boot Block Flag 2: TH50VSF2580AASB 3: TH50VSF2581AASB Program suspend 0: Not supported 1: Supported 2001-10-26 28/50 ...
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... HARDWARE SEQUENCE FLAGS FOR FLASH MEMORY The TH50VSF2580/2581AASB has a Hardware Sequence flag which allows the device status to be determined during an auto mode operation. The output data is read out using the same timing as that used when CEF = Read Mode. The output can be either High or Low ...
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... Programming Mode, DQ2 will output BUSY (READY / ) The TH50VSF2580/2581AASB has a (Busy state) indicates that an Auto-Program or auto-erase operation is in progress (Ready state) indicates that the operation has finished and that the device can now accept a new command. an operation has failed outputs a 0 after the rising edge the last command cycle ...
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... DATA PROTECTION The TH50VSF2580/2581AASB includes a function which guards against malfunction or data corruption. Protection against Program/Erase Caused by Low Supply Voltage To prevent malfunction at power-on or power-down, the device will not accept commands while this state, command input is ignored. LKO If V drops below V during an Auto Operation, the device will terminate Auto-Program execution. In ...
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... SRAM READ CYCLE (see Note 1) Address CE2S Hi-Z OUT Data invalid ACC OEE t CEE Hi ACC t CO2 t CO1 OEE t COE Output data valid t COE TH50VSF2580/2581AASB DF1 t DF2 Output data valid Hi ODO t BD Hi-Z 2001-10-26 32/50 ...
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... See Note 2 OUT D See Note SRAM WRITE CYCLE 2 ( -CONTROLLED) (see Note 4) Address CE2S Hi-Z OUT D See Note 5 IN TH50VSF2580/2581AASB ODW OEW Hi Input data valid ...
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... CE2S Hi-Z OUT D See Note SRAM WRITE CYCLE and Address CE2S Hi-Z OUT D See Note 5 IN TH50VSF2580/2581AASB ODW t COE Input data valid LB -CONTROLLED) (see Note ...
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... This is the timing of the Command Write Operation. The timing which is described in the following pages is essentially the same as the timing shown on this page. WE Control • Address t AS CEF CEF Control • Address t AS CEF TH50VSF2580/2581AASB t CMD Command address AHW t t CES CEH t t WELH WEHH ...
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... Read Mode (input of ID Read command sequence) (Continued) Address 555H t CMD CEF AAH IN D OUT ID Read Mode (input of Reset command sequence) Note: Word Mode address shown. BK: Bank address TH50VSF2580/2581AASB 2AAH BK + 555H BK + 00H t RC 55H 90H Manufacturer code Hi-Z ID Read Mode 2AAH 555H F0H 55H Hi-Z Read Mode ...
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... FLASH AUTO CHIP ERASE / AUTO BLOCK ERASE OPERATION ( 555H 2AAH Address t CMD CEF OE t OES WE D AAH IN t VCS V CCf Note: Word Mode address shown. BA: Block address for Auto Block Erase operation TH50VSF2580/2581AASB WE -CONTROLLED) 2AAH 555H PA 55H A0H PD Hi-Z 555H 555H 55H 80H AAH PA t OEHP t PPW ...
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... FLASH AUTO CHIP ERASE / AUTO BLOCK ERASE OPERATION ( Address 555H 2AAH t CMD CEF OE t OES WE D AAH IN t VCS V CCf Note: Word Mode address shown. BA: Block address for Auto Block Erase operation TH50VSF2580/2581AASB CEF -CONTROLLED) 555H PA 55H A0H PD Hi-Z 555H 555H 55H 80H AAH PA t PPW t OEHP D ...
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... CEF OE t OES WE t DF1 t DF2 OUT OUT Suspend Mode PA: Program address BK: Bank address BA: Block address RA: Read address Flag: Hardware Sequence flag TH50VSF2580/2581AASB OUT /t SUSE Suspend Mode RESP RESE 30H Hi-Z Program/Erase Mode Hi-Z PA/ ...
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... FLASH DURING AUTO-PROGRAM/ERASE OPERATION CEF FLASH HARDWARE RESET OPERATION WE RESET RESET FLASH READ AFTER Address RESET D Hi-Z OUT TH50VSF2580/2581AASB Command input sequence During operation t BUSY READY ACC Output data valid t OH 2001-10-26 40/50 ...
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... FLASH HARDWARE SEQUENCE FLAG (Toggle bit) Address CEF t AHT OE t OEHP WE Last D Command IN Data DQ2/6 Toggle t BUSY *DQ2/DQ6 stops toggling when auto operation has been completed. TH50VSF2580/2581AASB DATA Polling) PA/ PPW PCEW PBEW ACC DQ 7 Invalid t t AST ...
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... FLASH BLOCK PROTECT OPERATION Address t CMD CEF VPS RESET D 60H IN D OUT BA: Block address Address of next block *: 01H indicates that block is protected. TH50VSF2580/2581AASB CMD CMD t PPLH 60H 40H 60H 01H* 2001-10-26 42/50 ...
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... High during a Write cycle, the outputs will remain High-Impedance. (5) Since I/O pins may be in Output state at this point, do not attempt to apply input signals to them. ( stops toggling when the last command has been completed. OUT TH50VSF2580/2581AASB t t CCR CCR 2001-10-26 43/50 ...
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... CCs (2) When (2.2 V), the SRAM standby current is the same from 3 2.4 V. CCs (3) In CE2S-Controlled Data Retention Mode the device enters Minimum Standby Current Mode when CE2S ≤ 0.2 V. TH50VSF2580/2581AASB ( -40°~85°C) MIN 1 3.0 V 3.6 V (1) t ...
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... FLOWCHARTS OF FLASH MEMORY OPERATIONS Auto-Program Address = Address + 1 Note: The above command sequence takes place in Word Mode. TH50VSF2580/2581AASB Start Auto-Program Command Sequence (see below) DATA Polling or Toggle Bit No Last Address? Yes Auto-Program Completed Auto-Program Command Sequence (address/data) 555H/AAH 2AAH/55H 555H/A0H Program Address/Program Data ...
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... Fast Program Address = Address + 1 Fast Program Set Command Sequence (address/data) 555H/AAH 2AAH/55H 555H/20H TH50VSF2580/2581AASB Start Fast Program Set Command Sequence (see below) Fast Program Command Sequence (see below) DATA Polling or Toggle Bit No Last Address? Yes Program Sequence (see below) Fast Program ...
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... Auto Chip Erase Command Sequence (address/data) 555H/AAH 2AAH/55H 555H/80H 555H/AAH 2AAH/55H 555H/10H Note: The above command sequence takes place in Word Mode. TH50VSF2580/2581AASB Start (see below) DATA Polling or Toggle Bit Auto Erase Completed Auto Block / Auto Multi-Block Erase Command Sequence (address/data) 555H/AAH ...
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... VA: Byte address for programming Any of the addresses within the block being erased during a Block Erase operation “Don’t care” during a Chip Erase operation Any address not within the current block during an Erase Suspend operation TH50VSF2580/2581AASB Yes DQ7 must be rechecked even if DQ5 = 1 because DQ7 may change at the same time as DQ5 ...
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... Verify Block Protect Data = 01H? Yes Protect Another Block? Remove V ID Reset Command Block Protect Complete BPA: Block Address and ID Read Address (A6, A1, A0) ID Read Address = ( TH50VSF2580/2581AASB ID PLSCNT = PLSCNT + 1 No PLSCNT = 25? Yes Remove V No from RESET Reset Command Device Failed ...
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... PACKAGE DIMENSIONS TH50VSF2580/2581AASB Unit: mm 2001-10-26 50/50 ...