th50vsf2580 TOSHIBA Semiconductor CORPORATION, th50vsf2580 Datasheet - Page 21

• Manufacturer Part Number: th50vsf2580
• Description: Sram And Flash Memory Mixed Multi-chip Package
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Releases ID Read Mode or CFI Mode.
Clears the Command Register.
Releases the lock state if automatic operation has ended abnormally.
Stops any automatic operation which is in progress.
Stops any operation other than the above and returns the device to
Read Mode.
Command Write
E
command is written by inputting a pulse to WE with CEF = V
command can also be written by inputting a pulse to CEF with WE = V
latched on the falling edge of either WE or CEF . The data is latched on the rising edge of either WE or
and enter Read Mode. If an undefined command is input, the Command Register will be reset and the device
will enter Read Mode.
Software Reset
Mode or CFI Mode to Read Mode, releases the lock state if automatic operation has ended abnormally, and
clears the Command Register.
Hardware Reset
the device abandons the operation which is in progress and enters Read Mode after t
hardware reset is applied during data overwriting, such as a Write or Erase operation, data at the address or
block being written to at the time of the reset will become undefined.
The DQ pins are High-Impedance when RESET = V
operations and input of any command are allowed.
Comparison between Software Reset and Hardware Reset
input to CIOF, the device will operate in Word Mode. Read data or write commands using DQ0~DQ15. When
V
DQ8~DQ14 will become High-Impedance.
CEF . DQ0~DQ7 are valid for data input and DQ8~DQ15 are ignored.
BYTE
2
IL
The TH50VSF2580/2581AASB uses the standard JEDEC control commands for a single-power supply
To abort input of the command sequence use the Reset command. The device will reset the Command Register
Apply a software reset by inputting a Read/Reset command. A software reset returns the device from ID Read
A hardware reset initializes the device and sets it to Read Mode. When a pulse is input to RESET for t
After a hardware reset the device enters Read Mode if RESET = V
CIOF is used select Word Mode (16 bits) or Byte Mode (8 bits) for the TH50VSF2580/2581AASB. If V
PROM. A Command Write is executed by inputting the address and data into the Command Register. The
is input to CIOF, read data or write commands using DQ0~DQ7. A12F is used as the lowest address.
/Word Mode
ACTION
IL
. After the device has entered Read Mode, Read
SOFTWARE RESET
False
False
True
True
True
IL
TH50VSF2580/2581AASB
IH
and OE = V
or Standby Mode if RESET = V
IL
( CEF control). The address is
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HARDWARE RESET
IH
READY
( WE control). The
True
True
True
True
True
. Note that if a
IH
RP
IL
is
,
.