k4t51043qb-zcd5 Samsung Semiconductor, Inc., k4t51043qb-zcd5 Datasheet - Page 14

no-image

k4t51043qb-zcd5

Manufacturer Part Number
k4t51043qb-zcd5
Description
512mb B-die Ddr2 Sdram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
OCD default characteristics
Notes:
1. Absolute Specifications (0°C d
2. Impedance measurement condition for output source dc current: VDDQ = 1.7V; VOUT = 1420mV; (VOUT-VDDQ)/Ioh must be less than 23.4 ohms for
values of VOUT between VDDQ and VDDQ-280mV. Impedance measurement condition for output sink dc current: VDDQ = 1.7V; VOUT = 280mV;
VOUT/Iol must be less than 23.4 ohms for values of VOUT between 0V and 280mV.
3. Mismatch is absolute value between pull-up and pull-dn, both are measured at same temperature and voltage.
4. Slew rate measured from V
5. The absolute value of the slew rate as measured from DC to DC is equal to or greater than the slew rate as measured from AC to AC. This is guaran-
teed by design and characterization.
6. This represents the step size when the OCD is near 18 ohms at nominal conditions across all process and represents only the DRAM uncertainty.
Output slew rate load :
7. DRAM output slew rate specification applies to 400Mb/sec/pin and 533Mb/sec/pin speed bins.
8. Timing skew due to DRAM output slew rate mis-match between DQS / DQS and associated DQs is included in tDQSQ and tQHS specification.
Output impedance
Output impedance step size for OCD calibration
Pull-up and pull-down mismatch
Output slew rate
512Mb B-die DDR2 SDRAM
Description
IL
(AC) to V
T
CASE
d+95°C; VDD = +1.8V ±0.1V, VDDQ = +1.8V ±0.1V)
IH
(AC).
(VOUT)
Output
Parameter
Page 14 of 28
Sout
VTT
25 ohms
12.6
Min
1.5
0
0
Reference
Point
Nom
18
Max
23.4
1.5
4
5
DDR2 SDRAM
Rev. 1.5 July 2005
ohms
ohms
ohms
Unit
V/ns
1,4,5,6,7,8
Notes
1,2,3
1,2
6

Related parts for k4t51043qb-zcd5