k4d263238g-gc Samsung Semiconductor, Inc., k4d263238g-gc Datasheet - Page 15

• Manufacturer Part Number: k4d263238g-gc
• Description: 128mbit Gddr Sdram
• Manufacturer: Samsung Semiconductor, Inc.

AC OPERATING TEST CONDITIONS
Note 1 : In case of differential clocks(CK and CK), input reference voltage for clock is a CK and CK ’s crossing point
CAPACITANCE
Recommended decoupling capacitance added to power line at board.
Note :
DECOUPLING CAPACITANCE GUIDE LINE
K4D263238G-GC
Decoupling Capacitance between V
Decoupling Capacitance between V
Input reference voltage for CK(for single ended)
CK and CK signal maximum peak swing
CK signal minimum slew rate
Input Levels(V
Input timing measurement reference level
Output timing measurement reference level
Output load condition
Input capacitance( CK, CK )
Input capacitance(A
Input capacitance( CKE, CS, RAS,CAS, WE )
Data & DQS input/output capacitance(DQ
Input capacitance(DM0 ~ DM3)
1. V
2. V
Accordingly, clock duty should be measured at a CK and CK ’s crossing point.
All V
All V
DD
SS
and V
and V
DD
SS
pins are connected in chip. All V
pins are connected in chip. All V
IH
SSQ
DDQ
/V
0
Parameter
IL
~A
pins are separated each other
Parameter
Parameter
pins are separated each other.
)
(T
11
A
, BA
= 25qC, f=1MHz)
Output
0
~BA
DD
DDQ
1
)
and V
and V
0
~DQ
SS
SSQ
SSQ
DDQ
31
)
pins are connected in chip.
pins are connected in chip.
(Fig. 1) Output Load Circuit
(T
Z0=50:
A
= 0 to 65qC)
- 15 -
Symbol
C
LOAD
C
C
C
C
C
OUT
IN1
IN2
IN3
IN4
V
=30pF
REF
Symbol
C
C
0.50*V
See Fig.1
DC1
DC2
+0.4/V
Value
V
V
1.5
1.0
V
REF
tt
tt
=0.5*V
DDQ
R
REF
T
=50:
Min
1.0
1.0
1.0
1.0
1.0
-0.4
DDQ
V
=0.5*V
REF
0.1 + 0.01
0.1 + 0.01
128M GDDR SDRAM
Value
DDQ
Max
5.0
4.0
4.0
6.5
6.5
Rev 1.8 (March. 2005)
Unit
V/ns
V
V
V
V
V
Unit
uF
uF
Unit
pF
pF
pF
pF
pF
Note
1