k4d263238g-gc Samsung Semiconductor, Inc., k4d263238g-gc Datasheet - Page 18

• Manufacturer Part Number: k4d263238g-gc
• Description: 128mbit Gddr Sdram
• Manufacturer: Samsung Semiconductor, Inc.

AC CHARACTERISTICS (I)
Note : 1. For normal write operation, even numbers of Din are to be written inside DRAM
AC CHARACTERISTICS (II)
K4D263238G-GC
Row cycle time
Refresh row cycle time
Row active time
RAS to CAS delay for Read
RAS to CAS delay for Write
Row precharge time
Row active to Row active
Last data in to Row precharge
Last data in to Row precharge
@Auto Precharge
Auto precharge write recovery + Pre-
charge
Last data in to Read command
Col. address to Col. address
Mode register set cycle time
Exit self refresh to read command
Power down exit time
Refresh interval time
K4D263238G-GC2A
K4D263238G-GC33
K4D263238G-GC36
350MHz ( 2.86ns )
300MHz ( 3.3ns )
275MHz ( 3.6ns )
200MHz ( 5.0ns )
166MHz ( 6.0ns )
300MHz ( 3.3ns )
275MHz ( 3.6ns )
200MHz ( 5.0ns )
166MHz ( 6.0ns )
275MHz ( 3.6ns )
200MHz ( 5.0ns )
166MHz ( 6.0ns )
Frequency
Frequency
Frequency
2. The number of clock of tRP is restricted by the number of clock of tRAS and tRP
3. The number of clock of tWR_A is fixed. It can’t be changed by tCK
4. tRCDWR is equal to tRCDRD-2tCK and the number of clock can not be lower than 2tCK.
5. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and then
rounding off to the next higher integer unconditionally.
Parameter
Cas Latency
Cas Latency
Cas Latency
4
4
4
3
3
4
4
3
3
4
3
3
tRC
tRFC
tRCDRD
tRCDWR
tRP
tWR
tWR_A
tDAL
tCCD
tMRD
tXSR
tPDEX
tREF
tRAS
tRRD
tCDLR
Symbol
tRC
tRC
tRC
15
13
13
10
13
13
10
13
10
8
8
8
3tCK+
42.9
13.2
13.2
14.3
48.6
28.6
Min
200
6.6
9.9
7.8
tIS
10
5
2
1
2
tRFC
tRFC
tRFC
17
15
15
11
15
15
11
15
11
9
9
9
-2A
100K
Max
tRAS
tRAS
tRAS
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
10
9
9
7
6
9
9
7
6
9
7
6
- 18 -
tRCDRD tRCDWR
tRCDRD tRCDWR
tRCDRD tRCDWR
3tCK+
42.9
49.5
29.7
13.2
13.2
16.5
Min
200
6.6
9.9
7.8
tIS
5
9
2
1
2
5
4
4
3
3
4
4
3
3
4
3
3
-33
100K
3
2
2
2
2
2
2
2
2
2
2
2
Max
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
128M GDDR SDRAM
tRP
tRP
tRP
5
4
4
3
3
4
4
3
3
4
3
3
3tCK+
46.8
32.4
14.4
14.4
10.8
Min
200
7.2
7.8
tIS
54
18
5
9
2
1
2
-36
tRRD
tRRD
tRRD
Rev 1.8 (March. 2005)
4
3
3
3
2
3
3
3
2
3
3
2
100K
Max
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
tDAL
tDAL
tDAL
10
9
9
8
8
9
9
8
8
9
8
8
Unit
tCK
tCK
tCK
tCK
tCK
tCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
us
Unit
tCK
tCK
tCK
tCK
tCK
Unit
tCK
tCK
tCK
tCK
Unit
tCK
tCK
tCK
Note
2,5
3,5
5
5
5
4
5
5
5
3
1