k4s160822d Samsung Semiconductor, Inc., k4s160822d Datasheet - Page 40

• Manufacturer Part Number: k4s160822d
• Description: 2mx8 Sdram 1m X 8bit X 2 Banks Synchronous Dram Lvttl
• Manufacturer: Samsung Semiconductor, Inc.

DQ
CLOCK
KM48S2120D
Read Interrupted by Precharge Command & Read Burst Stop Cycle @Burst Length=Full page
A
ADDR
DQM
10
CKE
RAS
CAS
WE
/AP
CS
BA
CL=2
CL=3
*Note :
0
Row Active
(A-Bank)
RAa
RAa
1
1. At full page mode, burst is end at the end of burst. So auto precharge is possible.
2. About the valid DQs after burst stop, it is same as the case of RAS interrupt.
3. Burst stop is valid at every burst length.
But at burst write, Burst stop and RAS interrupt should be compared carefully.
Refer the timing diagram of "Full page write burst stop cycle".
Both cases are illustrated above timing diagram. See the label 0. 1, 2 on them.
2
3
(A-Bank)
Read
CAa
4
5
QAa0 QAa1 QAa2 QAa3 QAa4
6
QAa0 QAa1 QAa2 QAa3 QAa4
7
8
Burst Stop
- 40
9
HIGH
10
1
(A-Bank)
Read
CAb
*Note 2
11
2
12
QAb0 QAb1 QAb2 QAb3 QAb4 QAb5
13
QAb0 QAb1 QAb2 QAb3 QAb4 QAb5
14
15
CMOS SDRAM
Rev.1.0 (Mar. 1999)
16
Precharge
(A-Bank)
17
18
1
: Don't care
19
2