pdm41024sa10tty ETC-unknow, pdm41024sa10tty Datasheet - Page 7

• Manufacturer Part Number: pdm41024sa10tty
• Description: 1 Megabit Static Ram 128k X 8-bi
• Manufacturer: ETC-unknow

Rev. 3.3 - 4/09/98
Write Cycle No. 3 (Chip Enable Controlled)
SHADED AREA = PRELIMINARY DATA
Notes referenced are after Data Retention Table
AC Electrical Characteristics
Description
WRITE Cycle
WRITE cycle time
Chip enable active time
Address valid to end of write
Address setup time
Address hold from end of write
Write pulse width
Write pulse width
Data setup time
Data hold time
Write disable to output in low Z
Write enable to output in high Z
NOTE: Output Enable (OE) is inactive (high)
ADDR
D
CE2
CE1
OUT
WE
D
IN
t
AS
(1,3)
(1,3)
t
t
Sym
HZWE
t
t
LZWE
t
t
t
WP1
WP2
t
t
t
t
WC
CW
AW
DH
AS
AH
DS
t
AW
Min. Max. Min. Max. Min. Max. Units
t
10
10
10
WC
0
0
8
8
7
0
0
t
-10
CW
(7)
t
WP1
7
DATA VALID
t
DS
HIGH-Z
12
10
10
0
0
8
8
7
0
0
-12
(7)
7
t
AH
15
11
11
11
12
0
0
7
0
0
-15
7
t
DH
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PDM41024
7
10
11
12
1
2
3
4
5
6
7
8
9