hi-6110 Holt Integrated Circuits, Inc., hi-6110 Datasheet - Page 3

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hi-6110

Manufacturer Part Number
hi-6110
Description
Bc / Rt / Mt Message Processor
Manufacturer
Holt Integrated Circuits, Inc.
Datasheet

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FUNCTIONAL DESCRIPTION
HOST INTERFACE
The Holt HI-6110 provides a simple interface between a host
subsystem and a MIL-STD-1553 dual redundant data bus.
Messages are processed one at a time. The HI-6110 automatically
handles message formatting, error checking, message data
buffering, protocol checking and default responses. The host may
override default message responses by updating registers on-the-
fly.
The host communicates with the HI-6110 using a 16-bit
bidirectional data bus. On-chip bus transceivers allow the device to
be connected to the MIL-STD-1553 data buses using external
coupling transformers.
The HI-6110 can be configured as 1553 Bus Controller (BC),
Remote Terminal (RT) or Bus Monitor (MT). The BCMODE and
RTMODE inputs define the mode of operation as follows:
BCMODE RTMODE
ADDRESS
ADDRESS
RF1 RF0
SIGNAL
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 1 0 0
X 0 0 0
X 0 0 1
X 0 1 0
X 0 1 1
X 1 X X CONTROL REGISTER
RA3:0
RA3:0
W ile
While the /STR input is held low, output RF1 = 1 if the stored Bus Word had Command Sync, or output RF0 = 1 if the stored Bus Word had Data Sync.
1
0
0
h
1
0
1
0
0
0
1
reading
BC
STATUS WORD 1 ( if
STATUS WORD 2 only RT-RT Transmit RT COMMAND WORD 2 (from last RT-RT)
-
-
RECEIVED DATA FIFO
STATUS REGISTER
-
ERROR REGISTER
-
BUS A WORD
BUS B WORD
CONTROL REGISTER
BC
COMMAND WORD 1
COMMAND WORD 2 ( used for RT-RT only) TRANSMIT MODE DATA WORD
TRANSMIT DATA FIFO
-
BC
-
pulses low if
-
the
0
1
1
0
BUS A WORD or BUS B WORD registers sync type for the stored word can be determined from the RF0 and RF1 outputs.
STATUS WORD 2
1553 OPERATING MODE
Bus Controller (BC)
Remote Terminal (RT)
Bus Monitor (no assigned RT address)
Bus Monitor with assigned RT address
RT-RT,
SIGNALS RF1 AND RF0 IDENTIFY LAST RECEIVED 1553 WORD TYPE
Receive RT ) COMMAND WORD 1
Table 1. HI-6110 Internal Register Address Map
Table 2. MIL-STD-1553 Word Type Decoding
HOLT INTEGRATED CIRCUITS
RT or MT with assigned RT address
RECEIVED MODE DATA WORD
RECEIVED STATUS WORD (from last RT-RT)
RECEIVED DATA FIFO
STATUS REGISTER
MESSAGE REGISTER
ERROR REGISTER
-
BUS A WORD
BUS B WORD
CONTROL REGISTER
RT or MT with assigned RT address
TRANSMIT STATUS WORD
RESET TRANSMIT DATA FIFO
TRANSMIT DATA FIFO
CONTROL REGISTER
RT or MT with assigned RT address
-
Valid Receive Command Bus A
Valid Receive Command Bus B
,
REGISTER READ (R/ =1)
REGISTER WRITE (R/ =0)
HI-6110
MODE
MODE
MODE
3
The HI-6110 is further configured by setting various configuration
bits in the on-chip Control Register. Different sets of 16-bit registers
and message data FIFOs are available depending upon the mode
of operation (BC, RT or MT). The
signal for data read and write cycles. Data is output on the 16-bit
bidirectional data bus, D15-D0, when R/
D15-D0 are inputs when R/
registers on the rising edge of the
CS
Four Register address inputs (RA3, RA2, RA1, RA0) are used to
select internal registers during host read or write operations. Note
that internal registers may be write-only, read-only or read/write.
The register address map is different for BC, RT and MT modes as
not all registers are used in each mode. Table 1 defines the HI-6110
address map in detail.
CS
1
0
0
0
must be low for all register read / write operations:
W
R/
W
X
X
1
0
W STR
X
1
0
0
D15-D0
High impedance
High impedance
Output
Input
MT without assigned RT address
-
Valid Receive Command Bus A
Valid Receive Command Bus B
MT without assigned RT address
COMMAND WORD 1
COMMAND WORD 2 from last RT-RT
BC-transmitted MODE DATA WORD
Transmit RT STATUS WORD from last RT-RT
DATA FIFO, incl. RT-transmitted mode data
STATUS REGISTER
MESSAGE REGISTER
ERROR REGISTER
STATUS WORD (from receiving RT, if RT-RT)
BUS A WORD
BUS B WORD
CONTROL REGISTER
MT without assigned RT address
-
-
-
CONTROL REGISTER
W
is low, and data is written into internal
STR
STR
signal. The Chip Select input
OPERATION
No operation
No operation
Read
Write (on
W
pin is used as the timing
is high and
STR
rising edge)
STR
is low.

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