s5935qrc Applied Micro Circuits Corporation (AMCC), s5935qrc Datasheet - Page 171

• Manufacturer Part Number: s5935qrc
• Description: Pci Product
• Manufacturer: Applied Micro Circuits Corporation (AMCC)

S5935 – PCI Product
as ones. The number of zeros read back indicates the
amount of memory or I/O space a particular S5935
Pass-Thru region is requesting.
After the host reads all Base Address Registers in the
system (as every PCI device implements from one to
six), the PCI BIOS allocates memory and I/O space to
each Base Address region. The host then writes the
start address of each region back into the Base
Address Registers. The start address of a region is
always an integer multiple of the region size. For
example, a 64 Kbyte memory region is always
mapped to begin on a 64K boundary in memory. It is
important to note that no PCI device can xbe abso-
lutely located in system memory or I/O space. All
mapping is determined by the system, not the
application.
Accessing a Pass-Thru Region
After the system is finished defining all Base Address
Regions within a system, each Base Address Register
contains a physical address. The application software
must now find the location in memory or I/O space of
its hardware. PCI systems provide BIOS or operating
system function calls for application software to find
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particular devices on the PCI bus based on Vendor ID
and Device ID values. This allows application software
to access the device’s Configuration Registers.
The Base Address Register values in the S5935’s
Configuration Space may then be read and stored for
use by the program to access application hardware.
The value in the Base Address Registers is the physi-
cal address of the first location of that Pass-Thru
region. Some processor architectures allow this
address to be used directly to access the PCI device.
For Intel Architecture systems, the physical address
must be changed into a Segment/Offset combination.
For Real Mode operation in an Intel Architecture sys-
tem (device mapped below 1 Mbyte in memory),
creating a Segment/Offset pair is relatively simple. To
calculate a physical address, the CPU shifts the seg-
ment register 4 bits to the left and adds the offset
(resulting in a 20 bit physical address). The value in
the Base Address Register must be read and shifted 4
bits to the right. This is the segment value and should
be stored in one of the Segment registers. An offset of
zero (stored in SI, DI or another offset register)
accesses the first location in the Pass-Thru region.
Revision 1.02 – June 27, 2006
Data Book
DS1527
171