MB85RC64PNF-G-JNERE1 FUJITSU [Fujitsu Component Limited.], MB85RC64PNF-G-JNERE1 Datasheet - Page 4

• Manufacturer Part Number: MB85RC64PNF-G-JNERE1
• Description: Memory FRAM 64 K (8 K x 8) Bit I2C
• Manufacturer: FUJITSU [Fujitsu Component Limited.]

MB85RC64
■ I
• Start Condition, Stop Condition
Note : The FRAM device does not need the programming wait time like t
4
SCL
SDA
The I
data transfer can only be initiated by the bus master, which will also provide the serial clock for synchroni-
zation. The SDA signal should change while SCL is Low. However, as an exception, when starting and
stopping communication sequence, SDA is allowed to change while SCL is High.
• Start Condition
To start read or write operations by the I
in High in order to start reading and writing.
• Stop Condition
Set the SDA input from Low to High while the SCL input is in High in order to terminate the I
nication. Because the MB85RC64 does not need the writing wait time unlike E
state immediately after the stop condition input.
2
C COMMUNICATION PROTOCOL
such as.
2
C bus is a two wire serial interface that uses a bidirectional data bus (SDA) and serial clock (SCL). A
Start
2
C bus, set the SDA input from High to Low while the SCL input is
WC
after issuing the Stop Condition
2
PROM, it goes to the standby
Stop
DS05–13109–3E
2
C bus commu-