alc260d-ve-lf Realtek Semiconductor Corporation, alc260d-ve-lf Datasheet - Page 21
alc260d-ve-lf
Manufacturer Part Number
alc260d-ve-lf
Description
2 Channel High Definition Audio Codec
Manufacturer
Realtek Semiconductor Corporation
Datasheet
1.ALC260D-VE-LF.pdf
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22.05kHz: {12}=YNYNYNYNYNYNYNYNYNYNYNYN
{11}=YNYNYNYNYNYNYNYNYNYNYN
{-} =NN
7.3.
There are two types of reset within an HDA link:
• Link Reset: Generated by assertion of the RST# signal; all codecs return to their power-on state
• Codec Reset: Generated by software; directs a command to reset a specific codec back to its default
An initialization sequence is requested after any of the following three events:
1.
2.
3.
2 Channel High Definition Audio Codec
11.025kHz: {12}=YNNNYNNNYNNNYNNNYNNNYNNNYNNNYNNNYNNNYNNNYNNNYNNN
{11}=YNNNYNNNYNNNYNNNYNNNYNNNYNNNYNNNYNNNYNNNYNNN
{-} =NNNN
44.1kHz:
88.2kHz:
174.4kHz:
11.025kHz {12}{-}{11}{-}{11}{-}{12}{-}{11}{-}{11}{-}{12}{-}{11}{-}{11}{-}{12}{-}{11}{-}{11}{-}{11}{-}
22.05kHz {12}{-}{11}{-}{11}{-}{12}{-}{11}{-}{11}{-}{12}{-}{11}{-}{11}{-}{12}{-}{11}{-}{11}{-}{11}{-}
174.4kHz 12
44.1kHz
88.2kHz
state
Link Reset
Codec Reset
Codec changes its power state (e.g., hot docking a codec to an HDA system)
Rate
Reset and Initialization
Delivery Cadence
(repeat)
(repeat)
12-11-11-12-11-11-12-11-11-12-11-11-11- (repeat)
12
12- =Contiguous 12 frames containing 1 sample blocks each,
followed by one frame with no sample block.
12
followed by one frame with no sample block.
12
followed by one frame with no sample block.
2
4
-11
-11
2
4
- =Contiguous 12 frames containing 2 sample blocks each,
- =Contiguous 12 frames containing 4 sample blocks each,
2
4
-11
-11
2
4
-12
-12
2
4
-11
-11
Table 9. 44.1kHz Variable Rate of Delivery Timing
2
4
-11
-11
2
4
-12
-12
2
4
-11
-11
2
4
-11
-11
2
4
-12
-12
2
4
-11
-11
2
4
-11
-11
2
4
14
-11
-11
2
4
- (repeat)
- (repeat)
Track ID: JATR-1076-21 Rev. 1.4
ALC260(D)
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