alc268 Realtek Semiconductor Corporation, alc268 Datasheet - Page 29

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alc268

Manufacturer Part Number
alc268
Description
2+2 Channel High Definition Audio Codec
Manufacturer
Realtek Semiconductor Corporation
Datasheet

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Exit from ‘Link Reset’:
100µsec provides time for the codec PLL to stabilize)
last bit of frame SYNC, it means the codec requests an initialization sequence)
7.3.2.
A ‘Codec Reset’ is initiated via the Codec RESET command verb. It results in the target codec being
reset to the default state. After the target codec completes its reset operation, an initialization sequence is
requested.
2+2 Channel High Definition Audio Codec
BCLK
SYNC
SDOs
SDIs
RST#
If BCLK is re-started for any reason (codec wake-up event, power management, etc.)
Minimum of 4 BCLK after RST# is de-asserted, the controller starts to signal normal frame SYNC
When the codec drives its SDI to request an initialization sequence (when the SDI is driven high at the
Software is responsible for de-asserting RST# after a minimum of 100µsec BCLK running time (the
Codec Reset
1
2
Previous Frame
SYNC is absent
Normal Frame
3
Driven Low
Driven Low
Driven Low
4 BCLK
Figure 14. Link Reset Timing
4
4 BCLK
21
5
Pulled Low
Pulled Low
Pulled Low
Pulled Low
Link in Reset
6
>=100 usec
Track ID: JATR-1076-21
7
>= 4 BCLK
Wake Event
8
ALC268 Series
Initialization Sequence
Normal Frame
SYNC
Datasheet
9
Rev. 1.3

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