DS24B33+ MAXIM [Maxim Integrated Products], DS24B33+ Datasheet

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DS24B33+

Manufacturer Part Number
DS24B33+
Description
4Kb 1-Wire EEPROM with 200k Write/Erase Cycles
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
The DS24B33 is a 4096-bit, 1-Wire
nized as 16 memory pages of 256 bits each. Data is
written to a 32-byte scratchpad, verified, and then
copied to the EEPROM memory. The DS24B33 commu-
nicates over a single-conductor 1-Wire bus. The com-
munication follows the standard 1-Wire protocol. Each
device has its own unalterable and unique 64-bit regis-
tration number that is factory programmed into the chip.
The registration number is used to address the device
in a multidrop 1-Wire net environment. The EEPROM
provides 200,000 cycles of write/erase endurance at
+25°C. The DS24B33 is software compatible to the
DS2433.
19-5759; Rev 0; 2/11
1-Wire is a registered trademark of Maxim Integrated Products, Inc.
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
V
Storage of Calibration Constants
Board Identification
Storage of Product Revision Status
CC
μC
Typical Operating Circuit
________________________________________________________________ Maxim Integrated Products
General Description
R
PUP
IO
Applications
®
DS24B33
EEPROM orga-
GND
4Kb 1-Wire EEPROM with
200k Write/Erase Cycles
♦ 4096 Bits of Nonvolatile EEPROM Partitioned Into
♦ Read and Write Access is Highly Backward-
♦ 256-Bit Scratchpad with Strict Read/Write
♦ 200,000 Write/Erase Cycle Endurance at +25°C
♦ Unique, Factory-Programmed, 64-Bit Registration
♦ Switchpoint Hysteresis to Optimize Performance
♦ Communicates to Host at 15.4kbps or 125kbps
♦ Low-Cost Through-Hole and SMD Packages
♦ Operating Range: +2.8V to +5.25V, -40°C to +85°C
♦ IEC 1000-4-2 Level 4 ESD Protection (±8kV
+ Denotes a lead(Pb)-free/RoHS-compliant package.
T&R = Tape and reel.
DS24B33+
DS24B33+T&R
DS24B33S+
DS24B33S+T&R
Sixteen 256-Bit Pages
Compatible to the DS2433
Protocols Ensures Integrity of Data Transfer
Number Ensures Error-Free Device Selection and
Absolute Part Identity
in the Presence of Noise
Using 1-Wire Protocol
Contact, ±15kV Air, Typical) for IO Pin
PART
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
TEMP RANGE
Ordering Information
PIN-PACKAGE
TO-92
TO-92
8 SO (208 mils)
8 SO (208 mils)
Features
1

Related parts for DS24B33+

DS24B33+ Summary of contents

Page 1

... Low-Cost Through-Hole and SMD Packages ♦ Operating Range: +2.8V to +5.25V, -40°C to +85°C ♦ IEC 1000-4-2 Level 4 ESD Protection (±8kV Contact, ±15kV Air, Typical) for IO Pin PART IO DS24B33+ DS24B33 DS24B33+T&R DS24B33S+ DS24B33S+T&R GND + Denotes a lead(Pb)-free/RoHS-compliant package. T&R = Tape and reel. Features Ordering Information ...

Page 2

EEPROM with 200k Write/Erase Cycles ABSOLUTE MAXIMUM RATINGS IO Voltage Range to GND ........................................-0.5V to +6V IO Sink Current....................................................................20mA Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-55°C to +125°C Stresses beyond those listed ...

Page 3

ELECTRICAL CHARACTERISTICS (continued -40°C to +85°C.) (Note 1) A PARAMETER SYMBOL IO PIN: 1-Wire WRITE Write-Zero Low Time (Notes 2, 16) Write-One Low Time (Notes 2, 16) IO PIN: 1-Wire READ Read Low Time (Notes 2, 17) Read ...

Page 4

EEPROM with 200k Write/Erase Cycles ELECTRICAL CHARACTERISTICS (continued -40°C to +85°C.) (Note 1) A Note 20: Write-cycle endurance is degraded as T Note 21: Not 100% production tested; guaranteed by reliability monitor sampling. Note 22: Data ...

Page 5

TO-92 SO NAME 1 4 GND 5–8 N.C. Detailed Description The DS24B33 combines 4Kb of data EEPROM with a fully featured 1-Wire interface in a single chip. The memory is organized as 16 pages ...

Page 6

EEPROM with 200k Write/Erase Cycles registration number, 32-byte scratchpad, sixteen 32-byte pages of EEPROM, and a CRC-16 generator. Figure 2 shows the hierarchical structure of the 1-Wire protocol. The bus master must first provide one of the seven ...

Page 7

The shift register bits are initialized to 0. Then, starting with the LSB of the family code, one bit at a time is shifted in. After the 8th bit of the family code has been entered, the serial number is ...

Page 8

EEPROM with 200k Write/Erase Cycles Memory Access Address Registers and Transfer Status The DS24B33 employs three address registers: TA1, TA2, and E/S (Figure 6). Registers TA1 and TA2 must be loaded with the target address to which the ...

Page 9

Memory Function Commands The Memory Function Flowchart (Figure 7) describes the protocols necessary for accessing the memory of the DS24B33. The target address registers TA1 and TA2 are used for both read and write. The communica- tion between the master ...

Page 10

EEPROM with 200k Write/Erase Cycles BUS MASTER Tx MEMORY FUNCTION COMMAND 0Fh WRITE SCRATCHPAD? Y DS24B33 CLEARS PF, AA BUS MASTER Tx EEPROM ARRAY TARGET ADDRESS TA1 (T[7:0]), TA2 (T[15:8]) DS24B33 SETS SCRATCHPAD OFFSET = (T[4:0]) MASTER Tx ...

Page 11

FROM FIGURE 7a 55h N COPY SCRATCHPAD? Y BUS MASTER Rx TA1 (T[7:0]), TA2 (T[15:8]), AND E/S BYTE Y AUTHORIZATION CODE MATCH? N BUS MASTER Rx "1"s N MASTER Tx RESET FIGURE 7a *1-Wire IDLE HIGH FOR t ...

Page 12

EEPROM with 200k Write/Erase Cycles Read Memory [F0h] The Read Memory command is the general function to read from the DS24B33. After issuing the command, the master must provide a 2-byte target address, which should be in the ...

Page 13

A multidrop bus consists of a 1-Wire bus with multiple slaves attached. The DS24B33 supports both a stan- dard and overdrive communication speed of 15.4kbps (maximum) and 125kbps (maximum), respectively, over the full pullup voltage range. For pullup voltages of ...

Page 14

EEPROM with 200k Write/Erase Cycles This command can save time in a single-drop bus sys- tem by allowing the bus master to access the memory functions without providing the 64-bit ROM code. If more than one slave is ...

Page 15

FROM MEMORY FUNCTIONS FLOWCHART (FIGURE 7) BUS MASTER Tx ROM FUNCTION COMMAND 33h READ ROM COMMAND DS24B33Tx FAMILY CODE (1 BYTE) DS24B33 Tx SERIAL NUMBER (6 BYTES) DS24B33 Tx CRC BYTE Figure 9a. ROM Functions Flowchart ...

Page 16

EEPROM with 200k Write/Erase Cycles TO FIGURE 9a FROM FIGURE 9a FROM FIGURE 9a TO FIGURE 9a NOTE: THE OD FLAG REMAINS THE DEVICE WAS ALREADY AT OVERDRIVE SPEED BEFORE THE OVERDRIVE-MATCH ROM COMMAND WAS ...

Page 17

Signaling The DS24B33 requires strict protocols to ensure data integrity. The protocol consists of four types of signaling on one line: reset sequence with reset pulse and pres- ence pulse, write-zero, write-one, and read-data. Except for the presence pulse, ...

Page 18

EEPROM with 200k Write/Erase Cycles voltage on the data line should not exceed V ing the entire window. After the V W0L W1L WRITE-ONE TIME SLOT t W1L V PUP V IHMASTER ...

Page 19

A read-data time slot begins like a write-one time slot. The voltage on the data line must remain below V until the read low time t is expired. During the t RL dow, when responding with a 0, the DS24B33 ...

Page 20

EEPROM with 200k Write/Erase Cycles 1ST 2ND STAGE STAGE 9TH 10TH 11TH STAGE STAGE STAGE Figure 13. CRC-16 Hardware Description and Polynomial Command-Specific 1-Wire Communication Protocol—Legend SYMBOL RST ...

Page 21

Command-Specific 1-Wire Communication Protocol—Color Codes Write Scratchpad, Reaching the End of the Scratchpad RST PD Select WS TA <data to EOS> Read Scratchpad RST PD Select RS TA-E/S <data to EOS> Copy Scratchpad (Success) RST PD Select CPS TA-E/S Copy ...

Page 22

EEPROM with 200k Write/Erase Cycles REVISION REVISION NUMBER DATE 0 2/11 Initial release Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim ...

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