PS10 SUTEX [Supertex, Inc], PS10 Datasheet - Page 12

• Manufacturer Part Number: PS10
• Description: Quad Power Sequencing Controller
• Manufacturer: SUTEX [Supertex, Inc]

PS10 Power Good Clamp
If the active high enabled dc/dc converter used does not have an internal clamp, an external zener diode may be used to pro-
tect the module.
Typical Application Circuit for a 12V Non-Isolated System
Most FPGAs, Processors, ASICs, and DSPs require sequencing and rail voltage limitation during start-up and power down
sequence of its rails. A typical requirement is: V
ceed V
Turn On: V
Tun-Off: V
The Schottky diodes will limit the voltage between the rails to around 0.3V @ 3A during the power-up and power-down
sequence.
Assuming that the /EN pins of the dc/dc converters have no pull-up and have a 1.0V turn-off threshold, the power-down
sequence time delays can be approximated by:
T
T
PWRGD-C
PWRGD-B
+12V
GND
GND
-48V
A051204
IN
2004 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an
adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of
devices determined to be defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change
without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the
most current databook or to the Legal/Disclaimer page on the Supertex website.
at any time. This can be accomplished by sequencing the dc/dc converters by the following manner:
to T
to T
IN
DD
first, V
PWRGD-B
PWRGD-A
9.76K
_CORE first, V
487K
6.81K
R3
R1
R2
Notes:
1. Under Voltage Shutdown (UV) set to 37V.
2. Over Voltage Shutdown (OV) to 57.8V.
3. Other power good outputs will have the same
configuration as PWGRGD-A for Active High Enabled
Converters.
DD
= 1 F x 1V / 1mA = 1ms
= (2 F-1 F) x 1V / 1mA = 1ms
_IO second, and V
OV
V
UV
EE
RTB
6
5
7
V
TB
OV
V
IN
UV
RTB
EE
RTC
DD
TB
PS10
V
11
TC
_IO second, and V
IN
14
RTC
PS11
RTD
TC
TD
12
RTD
Ramp
Doc. #: DSFP-PS10PS11
PWRGD-D
PWRGD-C
TD
PWRGD-B
PWRGD-A
DD
13
10nF
_CORE last.
Ramp
10
DD
10nF
IN
_CORE must not exceed V
last.
PWRGD-D
PWRGD-C
PWRGD-B
PWRGD-A
2
3
4
49.9k
1
V+
EN
V-
R9
12k
2uF
C1
R8
12k
1uF
C2
12
DC/DC
Converter
Buck
Converter
/EN
DD
+3.3V
COM
_IO more than 0.6V and V
Buck
Converter
1235 Bordeaux Drive, Sunnyvale, CA 94089
+5V
/EN
TEL: [phone] / FAX: [phone]
Buck
Converter
+3.3V
/EN
30BQ015
30BQ015
+2.5V
www.supertex.com
VDD_IO
VDD_CORE
VIN
DD
_IO must not ex-
PS10/PS11
LOAD
GND
A051204