MC6800 Motorola, MC6800 Datasheet - Page 21

• Manufacturer Part Number: MC6800
• Description: 8-BIT MICROPROCESSING UNIT (MPU)
• Manufacturer: Motorola

within
was $~d (Least Significant
seven pairs of complementary
test the results
tinue
cause a branch
ceeds).
Z, V, and C:
the
whether
to zero. These two
cumulator
tions
Overflow
if the previous
( BCS) tests the state of the C bit to determ~~$$~~~previous
operation
during
for dire~#~@@@ulation
earl~:~~$~~
negative
(BNE)
pare (CMP)
Bit Test (BIT) to determine
3. Branch
4. Branch
The
The instr~~lia~%
A C~,$A/
The conditional
Four of the pairs are used for simple tests of status
1. Branch
2. Branch
FIGURE 24 – CONDITIONAL
sign
are set in an accumulator
with
BMI
BPL
BVC
BVS
BHI
BLS
are used to test the zero status
the
system d;%tlon.
Condition
or not the result of the previous
or positive,
Set ( BVS) tests the state of the V bit to ~&~*e
bit,
caused
and the operand.
:
:
:
:
MPU~~~kl$*useful
:
:
the
instruction
On Carry Clear (BCC) and Branch
on Minus
On
On
instruction
N, to
processors,
operation
next
N=l
N=@
V=$
V=l
c+
C+z=l
of the preceding
to another
a carry to occur.
Equal
Overflow
~~~~Register
branch
shown
z=@
instructions
BLE
BGT
respectively.
instruction
determine
;
;
;
;
‘$?.,,
. .?“s$.~$$:’
@
(B MI) and Branch
.,.y
of the CCR.
to test for equality
(BEQ)
l~~k,J.F
;
;
,,,1.,.
:
:
caused
instructions,
The bits are defined
sequence
in Table 5 are available
Bit=
whether
~
only
point
They are also used following
Clear
,,
Z+(N@V)=l
Z+(N@V)=@
‘ i$,:,i ;;*
instructions.
. .
BRANCH INSTRUCTIONS
and
in controlling
and the operand.
are useful
1), Similarly
if the preceding
MOTOROLA
if the
in sequence
an arithmetic
BCC
BEQ
BNE
BCS
BLT
BGE
operation
in the program
(CCR)
BCC ~~,~~~b
(BVC)
or not the same bit pos~~
operated
Branch
.,*.J?,’ -~>, ‘:?
:
:
:
:
:
:
Figure 24, consists
previous
bit, Z, to determine
operation
On Plus (BPL) tests
is a 6-bit
;
following
C=$
C=l
and
Z=l
Z=4
N@V=l
N@ V=@
They are used to
and either
between
it was advisable
On
properly,
program
(test
@~b$rY
in Figure
Q@r,@~
CONDITION
;
;
;
;
Branc@$~ns
to the user
instruction
result
Not
was equal
are useful
(test suc-
;
;
fails)
a Com-
register
bits N,
an ac-
Equal
flow
with
con-
was
,Y). ....,.,, ~
25.
Set
the
>.t;.’:
OPERATIONS
of
or
CODE REGISTER
,+ ::>
21
Semiconductor
{f$:,,.j ..::}
,,+,. we
‘*N cause. a branch
.,:t~@,$#CMP
,@$&~~n’&was positive.
will also occur
to precede
as NOP.
processors
later.
under
rather
the
accumulator
operations
complement
case in the following
values
Than
and N e V{~$<,,r~pectively.
followin$~~s
adde,~. in’~dition,
wh#~$Jhe
values
and Branch
for Z@ (N+V)
tion of BLE is identical
Conversely,
occur
are regarded
are in the range 00 (lowest)
comparison
value
value of the operand.
the accumulator
plements
used following
higher
parison
for testing
Branch
BLS will cause a branch
The last pair,
Systems
The fifth complementary
The
Branch
operand
accumulator
Or Eq~#k.~~~’~~G
in the accumulator
following
program
than
is between
were added
remaining
or lower;
On Lower
is between
These
to BCC and BCS. BHI tests for both C ~n@~~O;
On L@$~$anZero
value
in which
in which
any SEI instruction
which
relative
CLI-SEI.
indicating
On Greater Than Zero (BGT) test the status
BGT is similar to BGE except
8~~ration
(CMP)
numbers.
as unsigned
is lower
negative.
= 1 and Z@ (N +V) =0,
if the result
control
a CMP,
a zero result.
following
precautions
Branch
value is lower
in the accumulator
is higher
two
require
in si~w’~,wo’s
Products Inc.
– 1~,.,and
magnitude
it will cause a branch
or in which
or Same
the values at% re&~Yded as signed
the accumulator
will
@$~~g~&~ smaller
than
Conversely,
sen:~+~~.{~nsigned,
B LT will never cause a branch
pairs
This $%&&}{rom
in which
manufacture
should
to that for BLT except
BGE, the complement
it will cause a branc~,?k~~pWalue
On Less Than
E) test the status
cause
if the unsignq~’~~a~’”value
an interrupt
binary
is higher
operations
or the saW:~$J&b
pair, Branch
of the previous
to FF (highest).
than
B LT will always
are u~~l
are not necessary
+ 127.
(BLS)
(BLT)
when
use a CLI-NOP-SEI
with
than the operand.
the result was zero.
a branch
two negative
numbers,
the
BCS will cause a branch
than
complement,
an odd opcode
and Branch
the values
in
are,
value was positive
was negative
window
in which
oper&~~%50nversely,
respectively.
where
Or Equal Zero (BLE)
~ ‘testing
On Higher
November
the unsigned
or the same as the
following
that no branch
in a se~~~/~@~-
that is, the values
if the
the orientation
bits for N @V= 1
result was zero,
BCC following
cause a branch
numbers
that a branch
operand.
the
to be opened
to BLT,
two
being tested
for MC~
On Greater
(unsigned)
sequence
results
the
(Qi&~~~,nd
a CMP in
range
1977
and the
The ac-
positive
– such
follow-
binary
in the
two’s
com-
were
and
bits
will
will
or
of
of
in
is
if
a
if