PCA85232DA NXP [NXP Semiconductors], PCA85232DA Datasheet - Page 37
![no-image](/images/no-image-200.jpg)
PCA85232DA
Manufacturer Part Number
PCA85232DA
Description
LCD driver for low multiplex rates
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCA85232DA.pdf
(54 pages)
- Current page: 37 of 54
- Download datasheet (392Kb)
NXP Semiconductors
12. Application information
PCA85232
Product data sheet
12.1.1 Max value of pull-up resistor
12.1.2 Min value of pull-up resistor
12.1 Pull-up resistor sizing on I
The bus capacitance (C
capacitance on pin SDA limits the maximum value of the pull-up resistor (R
specified rise time.
According to the I
input threshold of V
t
whereas t1 and t2 are the time since the charging started. The values for t1 and t2 are
derivatives of the functions V(t1) and V(t2):
with the results of
R
calculated with
The supply voltage limits the minimum value of resistor R
sink current (see value of I
calculated with
The designer now has the minimum and maximum value of R
and R
V t1
V t2
t1
t2
t
R
R
r
r
t
PU(max)
( )
( )
PU max
PU min
will be calculated with
r
=
=
=
=
(
(
–
–
–
t2 t1
PU(min)
R
=
=
R
R
PU
)
)
PU
PU
–
0.3V
0.7V
is a function of the rise time (t
=
=
C
C
C
b
V
------------------------- -
---------------------- -
0.8473C
b
b
are shown in
DD
DD
×
DD
×
×
ln 0.3
Equation
Equation
I
ln 0.7
ln 0.3
All information provided in this document is subject to legal disclaimers.
t
OL
–
r
(
=
=
(
(
2
V
C-bus specification the rise time (t
IL
V
V
OL
b
)
DD
DD
)
)
=
= 0.3V
+
Rev. 1 — 8 December 2010
R
(
(
300
------------------------- -
b
Equation
0.8473C
1 e
1 e
) is the total capacitance of wire, connections, and pins. This
14:
15:
PU
OL
–
–
Figure 26
C
×
DD
-t1 R
-t2 R
on pin SDAACK in
b
10
×
and V
⁄
⁄
9 –
b
ln 0.7
PU
PU
8:
2
(
C-bus
C
C
b
b
and
IH
)
)
)
r
) and the bus capacitance (C
= 0.7V
Figure
DD
27.
Table
. The value for t
r
) is defined between the V
LCD driver for low multiplex rates
18). R
PU
due to the specified minimum
PU(min)
PU
. The values for R
r(max)
as a function of V
PCA85232
b
) and will be
is 300 ns.
© NXP B.V. 2010. All rights reserved.
PU
) due to the
DD
PU(max)
related
37 of 54
DD
(10)
(12)
(13)
(14)
(15)
(11)
(8)
(9)
is
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