PCA9541PW/03 NXP [NXP Semiconductors], PCA9541PW/03 Datasheet - Page 13

no-image

PCA9541PW/03

Manufacturer Part Number
PCA9541PW/03
Description
2-to-1 I2C-bus master selector with interrupt logic and reset
Manufacturer
NXP [NXP Semiconductors]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCA9541PW/03
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
PCA9541PW/03
Quantity:
1 872
Company:
Part Number:
PCA9541PW/03,118
Quantity:
1 872
NXP Semiconductors
Table 11.
PCA9541_5
Product data sheet
Type version Master
PCA9541/01
PCA9541/02
at power-up
PCA9541/02
after STOP
PCA9541/03
Default Control Register values
MST_0
MST_1
MST_0
MST_1
MST_0
MST_1
MST_0
MST_1
Table 12
master device wants to take control of the I
function of the current I
Control Register.
Current status of the I
NBUSON is one of the following:
‘I
‘I
Remark: Only the 4 LSBs of the Control Register are described in
those bits control the I
application and are not discussed in the table.
The read sequence is performed by the master as:
S - 111xxxx0 - 000x0001 - Sr - 111xxxx1 - DataRead - P
The write sequence is performed by the master as:
S - 111xxxx0 - 000x0001 - DataWritten - P
Bit 7
NTESTON TESTON
2
2
C-bus off’ means that upstream and downstream channels are not connected together.
C-bus on’ means that upstream and downstream channels are connected together.
The master reading its Control Register does not have control and the I
The master reading its Control Register does not have control and the I
The master reading its Control Register has control and the I
The master reading its Control Register has control and the I
0
0
0
0
0
0
0
0
describes which command needs to be written to the Control Register when a
Bit 6
0
0
0
0
0
0
0
0
2
2
Rev. 05 — 1 October 2007
C-bus is determined by the bits MYBUS, NMYBUS, BUSON and
2
C-bus control. The logic value for the 4 MSBs is specific to the
Bit 5
not used
C-bus control status performed after an initial reading of the
2-to-1 I
0
0
0
0
0
0
0
0
2
C-bus master selector with interrupt logic and reset
Bit 4
BUSINIT
0
0
0
0
0
0
0
0
2
C-bus. Byte written to the Control Register is a
Bit 3
NBUSON
0
1
0
0
0
1
0
0
Bit 2
BUSON
1
0
0
0
1
0
0
0
2
2
C-bus is off.
C-bus is on.
Table 12
Bit 1
NMYBUS
PCA9541
© NXP B.V. 2007. All rights reserved.
0
1
0
1
0
1
0
1
2
2
since only
C-bus is off.
C-bus is on.
Bit 0
MYBUS
13 of 43
0
0
0
0
0
0
0
0

Related parts for PCA9541PW/03