ADV7129KS AD [Analog Devices], ADV7129KS Datasheet - Page 13

• Manufacturer Part Number: ADV7129KS
• Description: 192-Bit, 360 MHz True-Color Video DAC with Onboard PLL
• Manufacturer: AD [Analog Devices]

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DIGITAL-TO-ANALOG CONVERTERS (DACS)
AND VIDEO OUTPUTS
The ADV7129 contains three high speed video DACs. The
DAC outputs are represented as the three primary analog color
signals IOR (red video), IOG (green video) and IOB (blue
video).
DACs and Analog Outputs
The part contains three matched 8-bit digital-to-analog converters.
The DACs are designed using an advanced, high speed, seg-
mented architecture. The bit currents corresponding to each
digital input are routed to either IOR, IOG, IOB (bit = “1”) or
IOR, IOG, IOB (bit = “0”). Normally IOR, IOG, & IOB are
connected to GND.
Figure 10. DAC Output Termination (Doubly Terminated
50
The analog video outputs are high impedance current sources.
Each of the these three RGB current outputs are specified to di-
rectly drive a 25
Reference Input and R
An external 1.235 V voltage reference is preferred to set up the
analog outputs of the ADV7129. The reference voltage is con-
nected to the V
ence, the on-chip voltage reference is internally connected to
the V
rents, although with slightly less accuracy.
(SOURCE TERMINATION)
REF
Load)
DACs
pin. The internal reference will set up the DAC cur-
Z
S
REF
IOR, IOG, IOB
= 50
load (doubly-terminated 50 ).
input. In the absence of an external refer-
SET
Z
(CABLE)
O
= 50
Z
(MONITOR)
L
= 50
–13–
A resistor R
R
corresponds to the generation of two times RS-343A video lev-
els into a doubly-terminated 50
resulting video waveform and the Video Output Truth Table il-
lustrates the corresponding control input stimuli. On the
ADV7129 SYNC can be encoded on any of the analog signals,
however in practice, SYNC is generally encoded on either the
IOG output or on all of the video outputs.
Any combination of R
programming of SYNC and pedestal are possible provided that
the maximum DAC current of 60 mA and the DAC output
compliance specifications are adhered to. The following tables
show the current levels for different values of R
R
Figure 11. Composite Video Waveform SYNC Decoded;
Pedestal = 7.5 IRE
BSET
LOAD
92.5 IRE
7.5 IRE
40 IRE
) input of the part and ground. An R
termination.
SET
is connected between the R
SET
, DAC termination resistors and
load. Figure 11 illustrates the
SET
SET
ADV7129
value of 280
(R
SET
RSET
WHITE LEVEL
BLACK LEVEL
BLANK LEVEL
SYNC LEVEL
resistors and
, R
GSET
,