X9110_08 INTERSIL [Intersil Corporation], X9110_08 Datasheet - Page 5

• Manufacturer Part Number: X9110_08
• Description: Dual Supply/Low Power/1024-Tap/SPI Bus
• Manufacturer: INTERSIL [Intersil Corporation]

may be written indirectly by transferring the contents of one
of four associated Data Registers via the XFR Data Register;
(3) it is loaded with the contents of its data register zero
(DR0) upon power-up.
The Wiper Counter Register is a volatile register; that is, its
contents are lost when the X9110 is powered-down. Although
the register is automatically loaded with the value in DR0 upon
power-up, this may be different from the value present at
power-down. Power-up guidelines are recommended to ensure
proper loadings of the DR0 value into the WCR.
DATA REGISTERS (DR)
The potentiometer has four 10-bit non-volatile Data
Registers. These can be read or written directly by the host.
Data can also be transferred between any of the four Data
Registers and the Wiper Counter Register. All operations
changing data in one of the Data Registers is a nonvolatile
operation and will take a maximum of 10ms.
TABLE 3. STATUS REGISTER, SR (1-BIT)
WCR9
(MSB)
(LSB)
BIT 9
MSB
WIP
NV
V
TABLE 1. WIPER CONTROL REGISTER, WCR (10-BIT), WCR9–WCR0: Used To Store The Current Wiper Position (Volatile, V)
TABLE 2. DATA REGISTER, DR (10-BIT), BIT 9–BIT 0: Used to store wiper positions or data (Non-Volatile, NV)
WCR8
BIT 8
NV
V
WCR7
5
BIT 7
NV
V
WCR6
BIT 6
NV
V
WCR5
BIT 5
NV
V
X9110
WCR4
BIT 4
If the application does not require storage of multiple
settings for the potentiometer, the Data Registers can be
used as regular memory locations for system parameters or
user preference data.
DR[9:0] is used to store one of the 1024 wiper position
(0~1023) (see Table 2).
STATUS REGISTER (SR)
This 1-bit status register is used to store the system status
(see Table 3).
WIP: Write In Progress status bit, read only.
• When WIP = 1, indicates that high-voltage write cycle is in
• When WIP=0, indicates that no high-voltage write cycle is
NV
V
progress.
in progress.
WCR3
BIT 3
NV
V
WCR2
BIT 2
NV
V
WCR1
BIT 1
NV
V
February 13, 2008
WCR0
(LSB)
BIT 0
LSB
NV
V
FN8158.3