24LC00-/OT MICROCHIP [Microchip Technology], 24LC00-/OT Datasheet - Page 3

• Manufacturer Part Number: 24LC00-/OT
• Manufacturer: MICROCHIP [Microchip Technology]

TABLE 1-2:
FIGURE 1-1:
 2004 Microchip Technology Inc.
All parameters apply across the specified
operating ranges unless otherwise noted.
Clock frequency
Clock high time
Clock low time
SDA and SCL rise time
SDA and SCL fall time
Start condition hold time
Start condition setup time
Data input hold time
Data input setup time
Stop condition setup time
Output valid from clock
Bus free time
Output fall time
(from 0.7 V
Input filter spike suppression
(SDA and SCL pins)
Write cycle time
Endurance
Note 1:
SCL
SDA
IN
SDA
OUT
2:
3:
4:
Parameter
Not 100% tested. C
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
The combined T
noise spike suppression. This eliminates the need for a TI specification for standard operation.
This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from our web site.
CC
to 0.3 V
AC CHARACTERISTICS
T
SP
Tsu:sta
BUS TIMING DATA
CC
T
HD
)
T
:
SP
STA
F
and V
F
T
T
T
T
T
T
T
T
T
T
T
T
T
T
Symbol
B
SU
SU
SU
AA
OF
SP
R
WC
CLK
HIGH
LOW
F
HD
HD
BUF
= total capacitance of one bus line in pF.
T
:
:
:
:
:
STA
DAT
STO
LOW
STA
DAT
HYS
specifications are due to Schmitt Trigger inputs which provide improved
V
CC
4000
4700
4000
4700
4000
4700
Min.
250
1M
STD MODE
—
—
—
—
—
—
—
0
= 2.5V - 5.5V
T
T
HIGH
HD
:
DAT
Vcc = +2.5V to 5.5V
Industrial (I): T
Max.
1000
3500
100
300
250
50
10
—
—
—
—
—
—
—
—
—
T
AA
Vcc = 4.5V - 5.5V
20 +0.1
1300
1300
Min.
FAST MODE
600
600
600
100
600
1M
C
—
—
—
—
—
—
0
B
A
T
= -40°C to +85°C
SU
24LCS61/24LCS62
:
DAT
Max.
400
300
300
900
250
—
—
—
—
—
—
—
—
50
10
—
cycles 25°C, V
Units
T
kHz
SU
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
:
T
STO
R
From V
From V
After this period the first
clock pulse is generated
Only relevant for repeated
Start condition
(Note 2)
(Note 2)
Time the bus must be free
before a new transmission
can start
(Note 1), C
(Notes 1, 3)
Byte or Page mode
mode (Note 4)
IL
IL
CC
Remarks
to V
to V
T
= 5.0V, Block
B
BUF
DS21226E-page 3
IH
IH
100 pF
(Note 1)
(Note 1)