25LC640-E/ST MICROCHIP [Microchip Technology], 25LC640-E/ST Datasheet - Page 12

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25LC640-E/ST

Manufacturer Part Number
25LC640-E/ST
Description
64K SPI Bus Serial EEPROM
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
25AA640/25LC640
3.7
The following protection has been implemented to
prevent inadvertent writes to the array:
• The write enable latch is reset on power-up
• A write enable instruction must be issued to set
• After a byte write, page write, or Status register
• CS must be set high after the proper number of
• Access to the array during an internal write cycle
TABLE 3-3:
DS21223G-page 12
the write enable latch
write, the write enable latch is reset
clock cycles to start an internal write cycle
is ignored and programming is continued
WPEN
X
0
1
X
Data Protection
High
Low
WP
WRITE-PROTECT FUNCTIONALITY MATRIX
X
X
WEL
0
1
1
1
Protected Blocks
Protected
Protected
Protected
Protected
3.8
The 25XX640 powers on in the following state:
• The device is in low-power Standby mode
• The write enable latch is reset
• SO is in high-impedance state
• A high-to-low transition on CS is required to enter
.
(CS = 1)
the active state
Unprotected Blocks
Power-On-State
Protected
Writable
Writable
Writable
 2004 Microchip Technology Inc.
Status Register
Protected
Protected
Writable
Writable

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