HYB25D256160CC-5 QIMONDA [Qimonda AG], HYB25D256160CC-5 Datasheet - Page 3

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HYB25D256160CC-5

Manufacturer Part Number
HYB25D256160CC-5
Description
256-Mbit Double-Data-Rate SDRAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HYB25D256160CC-5
Manufacturer:
SIEMENS
Quantity:
1
1
This chapter lists all main features of the product family HY[B/I]25D256[16/40/80]0C[E/C/F/T](L) and the ordering information.
1.1
• Double data rate architecture: two data transfers per clock
• Bidirectional data strobe (DQS) is transmitted and
• DQS is edge-aligned with data for reads and is center-
• Differential clock inputs (CK and CK)
• Four internal banks for concurrent operation
• Data mask (DM) for write data
• DLL aligns DQ and DQS transitions with CK transitions
• Commands entered on each positive CK edge; data and
• Burst Lengths: 2, 4, or 8
• CAS Latency: 1.5 (DDR200 only), 2, 2.5, 3
1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined
Rev. 2.3, 2007-03
03062006-8CCM-VPUW
Product Type Speed Code
Speed Grade
Max. Clock
Frequency
cycle
received with data, to be used in capturing data at the
receiver
aligned with data for writes
data mask referenced to both edges of DQS
in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury,
lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers.
Component
@CL3
@CL2.5
@CL2
Overview
Features
f
f
f
CK3
CK2.5
CK2
–5
DDR400B
200
166
133
3
• Auto Precharge option for each burst access
• Auto Refresh and Self Refresh Modes
• RAS-lockout supported
• 7.8 µs Maximum Average Periodic Refresh Interval
• 2.5 V (SSTL_2 compatible) I/O
• Standard Temperature Range (0 °C - +70 °C) or Industrial
• P-TFBGA-60-12 package with 3 depopulated rows
• P-TSOPII-66 package
• RoHS
V
V
V
V
Temperature Range (–40 °C - +85 °C)
(8 × 12 mm
DDQ
DDQ
DD
DD
= 2.5 V ± 0.2 V (DDR200, DDR266, DDR333);
= 2.6 V ± 0.1 V (DDR400)
–6
DDR333B
166
166
133
= 2.5 V ± 0.2 V (DDR200, DDR266, DDR333);
= 2.6 V ± 0.1 V (DDR400)
1)
compliant product types available (green product)
2
)
HY[B/I]25D256[16/40/80]0C[E/C/F/T](L)
256 Mbit Double-Data-Rate SDRAM
Performance of –5, –6 and –7
t
RAP
–7
DDR266A
143
133
=
t
RCD
Internet Data Sheet
TABLE 1
Unit
MHz
MHz
MHz

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