ADP3415LRM-REEL AD [Analog Devices], ADP3415LRM-REEL Datasheet

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ADP3415LRM-REEL

Manufacturer Part Number
ADP3415LRM-REEL
Description
Dual MOSFET Driver with Bootstrapping
Manufacturer
AD [Analog Devices]
Datasheet

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GENERAL DESCRIPTION
The ADP3415 is a dual MOSFET driver optimized for driving
two N-channel FETs that are the two switches in the nonisolated
synchronous buck power converter topology. Each driver size is
optimized for performance in notebook PC regulators for CPUs
in the 20 A range. The high-side driver can be bootstrapped atop
the switched node of the buck converter as needed to drive the
upper switch and is designed to accommodate the high voltage
slew rate associated with high performance, high frequency
switching. The ADP3415 features an overlapping protection
circuit (OPC); undervoltage lockout (UVLO) that holds the
switches off until the driver is assured of having sufficient voltage
for proper operation; a programmable transition delay; and a
synchronous drive disable pin. The quiescent current, when the
device is disabled, is less than 100 µA.
The ADP3415 is specified over the extended commercial
temperature range of 0°C to 100°C and is available in a 10-lead
MSOP package.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
FEATURES
All-in-One Synchronous Buck Driver
One PWM Signal Generates Both Drives
Anticross Conduction Protection Circuitry
Programmable Transition Delay
Zero-Crossing Synchronous Drive Control
Synchronous Override Control
Undervoltage Lockout
Shutdown Quiescent Current <100 A
APPLICATIONS
Mobile Computing CPU Core Power Converters
Multiphase Desktop CPU Supplies
Single-Supply Synchronous Buck Converters
Standard-to-Synchronous Converter Adaptations
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
FROM DUTY RATIO
ENABLE CONTROL
FROM SYSTEM
FROM SYSTEM
DRVLSD
STATE LOGIC
MODULATOR
GND
VCC
DLY
SD
IN
Figure 1. Typical Application Circuit
FUNCTIONAL BLOCK DIAGRAM
© 2004 Analog Devices, Inc. All rights reserved.
PROTECTION
IN
SD
DRVLSD
DLY
OVERLAP
CIRCUIT
UVLO
Dual MOSFET Driver
ADP3415
with Bootstrapping
VCC
GND
5V
DRVH
DRVL
BST
SW
ADP3415
ADP3415
VCC
V
DCIN
www.analog.com
BST
DRVH
SW
DRVL
V
OUT

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ADP3415LRM-REEL Summary of contents

Page 1

FEATURES All-in-One Synchronous Buck Driver One PWM Signal Generates Both Drives Anticross Conduction Protection Circuitry Programmable Transition Delay Zero-Crossing Synchronous Drive Control Synchronous Override Control Undervoltage Lockout Shutdown Quiescent Current <100 A APPLICATIONS Mobile Computing CPU Core Power Converters Multiphase ...

Page 2

ADP3415–SPECIFICATIONS Parameter SUPPLY (VCC) 2 Quiescent Current Shutdown Mode Operating Mode UNDERVOLTAGE LOCKOUT (UVLO) UVLO Threshold UVLO Hysteresis LOW-SIDE DRIVER SHUTDOWN (DRVLSD) 3 Input Voltage High 3 Input Voltage Low 3, 4 Propagation Delay (See Figure 3) SHUTDOWN (SD) 3 ...

Page 3

... MLC type and should have substantially greater capacitance (e.g., ~ 20×) than the input capacitance of the upper FET. Temperature Model Guide ADP3415LRM-REEL 0°C to 100°C ADP3415LRM-REEL7 0°C to 100°C ADP3415LRMZ-REEL* 0°C to 100° Pb-free part. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection ...

Page 4

ADP3415 V UVLOTH SD IN DRVH T ON DLY DLY R DLY DRVL T ON DLY DRVLSD IN DRVLSD DRVL UVLO BIAS THERM BIAS SD THSD EN CLR SET ADP3415 Figure 2. Functional Block ...

Page 5

IN tpdl DRVL tf DRVL DRVL tpdh DRVH DRVH-SW Figure 4. Switching Timing Diagram (Propagation Delay Referenced to 50%, Rise and Fall Time to 10% and 90% Points) IN DRVL SW DRVH Figure 5. Switching Waveforms–SW Node Failure Mode–DRVL Timeout ...

Page 6

ADP3415–Typical Performance Characteristics 2V/DIV DRVH DRVL IN 20ns/DIV TIME – ns TPC 1. DRVH Fall and DRVL Rise Times 2V/DIV DRVL DRVH IN 20ns/DIV TIME – ns TPC 2. DRVL Fall and DRVH Rise Times 100 VCC = 5V 90 ...

Page 7

VCC = 3nF 47 LOAD tpdl 42 DRVH tpdl DRVL JUNCTION TEMPERATURE – C TPC 7. DRVH and DRVL Propagation Delay vs. Temperature 52 ...

Page 8

ADP3415 THEORY OF OPERATION The ADP3415 is a dual MOSFET driver optimized for driving two N-channel FETs in a synchronous buck converter topology. A single duty ratio modulation signal is all that is required to command the proper drive signal ...

Page 9

Shutdown For optimal system power management, when the output voltage is not needed, the ADP3415 can be shut down to conserve power. When the SD pin is high, the ADP3415 is enabled for normal operation. Pulling the SD pin low ...

Page 10

ADP3415 OUTLINE DIMENSIONS 10-Lead Micro Small Outline Package [MSOP] (RM-10) Dimensions shown in millimeters 3.00 BSC 10 6 4.90 BSC 3.00 BSC 1 5 PIN 1 0.50 BSC 0.95 0.85 1.10 MAX 0.75 0.15 0.27 SEATING 0.23 0.00 PLANE 0.17 ...

Page 11

Revision History Location 1/04—Data Sheet changed from REV REV. B. Updated ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 12

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