STM8L151G4Y3 STMICROELECTRONICS [STMicroelectronics], STM8L151G4Y3 Datasheet - Page 9
STM8L151G4Y3
Manufacturer Part Number
STM8L151G4Y3
Description
8-bit ultralow power MCU, up to 32 KB Flash, 1 KB Data EEPROM RTC, LCD, timers, USART, I2C, SPI, ADC, DAC, comparators
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.STM8L151G4Y3.pdf
(122 pages)
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STM8L151xx, STM8L152xx
1
Introduction
This document describes the STM8L15xxx family features, pinout, mechanical data and
ordering information. The STM8L15xxx devices are referred to as medium-density devices
in the STM8L15xxx reference manual (RM0031) and in the STM8L Flash programming
manual (PM0054)
For more details on the whole STMicroelectronics ultralow power family please refer to
Section 2.2: Ultralow power continuum on page
For information on the debug module and SWIM (single wire interface module), refer to the
STM8 SWIM communication protocol and debug module user manual (UM0470).For
information on the STM8 core, please refer to the STM8 CPU programming manual
(PM0044).
The STM8L15xxx devices provide the following benefits:
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All devices offer 12-bit ADC, DAC, two comparators, Real-time clock three 16-bit timers, one
8-bit timer as well as standard communication interface such as SPI, I2C and USART. A
4x28-segment LCD is available on the STM8L152xx line.
device features and peripheral counts
complete range of peripherals proposed in this family.
The STM8L15xxx microcontroller family is suitable for a wide range of applications:
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Figure 1 on page 13
Integrated system
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Ultralow power consumption
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Advanced features
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Medical and handheld equipment
Application control and user interface
PC peripherals, gaming, GPS and sport equipment
Alarm systems, wired and wireless sensors
Short development cycles
Up to 32 Kbytes of medium-density embedded Flash program memory
1 Kbyte of data EEPROM
Internal high speed and low-power low speed RC.
Embedded reset
195 µA/MHZ + 440 µA (dynamic consumption)
0.9 µA with LSI in Active-halt mode
Clock gated system and optimized power management
Capability to execute from RAM for Low power wait mode and Low power run
mode
Up to 16 MIPS at 16 MHz CPU clock frequency
Direct memory access (DMA) for memory-to-memory or peripheral-to-memory
access.
Application scalability across a common family product architecture with
compatible pinout, memory map and modular peripherals.
Wide choice of development tools
shows the general block diagram of the device family.
Doc ID 15962 Rev 5
and
Section 3 on page 13
12.
Table 2: STM8L15x low power
give an overview of the
Introduction
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