BUK104-50SP PHILIPS [NXP Semiconductors], BUK104-50SP Datasheet - Page 9

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BUK104-50SP

Manufacturer Part Number
BUK104-50SP
Description
PowerMOS transistor Logic level TOPFET
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
Philips Semiconductors
January 1993
PowerMOS transistor
Logic level TOPFET
Fig.18. Typical overload protection characteristics.
Fig.16. Maximum drain source supply voltage for
50
40
30
20
10
10
0.1
SC load protection. V
for SC load protection. V
0
10
8
6
4
2
0
1
t
Fig.17. Minimum protection supply voltage
0
0
0.1
d sc
VDDP(P) / V
VPSP / V
TIME / ms
= f(P
BUK104-50S
BUK104-50L
2
DS
2
); conditions: V
4
4
POWER / kW
DDP(P)
VIS / V
VIS / V
PDSM
PSP
1
= f(V
6
6
PS
= f(V
V
IS
min
PSP
); T
IS
); T
8
8
; V
max
mb
BUK104-50L/S
BUK104-50L/S
mb
BUK104-50L/S
IS
150 ˚C
25 ˚C
5 V
10
10
10
9
Fig.20. Typical overload protection energy, T
Conditions: V
E
Fig.19. Typical overload protection characteristics.
0.5
0.4
0.3
0.2
0.1
SC(TO)
20
15
10
0.4
0.3
0.2
0.1
Fig.21. Typical clamping characteristics, 25 ˚C.
5
0
0
0
I
-60
50
D
ID / A
Energy & Time
0
ESC(TO) / J
= f(V
= f(V
-20
DS
PS
DD
); conditions: R
2
); conditions: V
= 13 V; V
20
Energy / J
Time / ms
4
60
VDS / V
PS
Tmb / C
VPS / V
BUK104-50L
60
= V
IS
BUK104-50LP/SP
100
DS
6
= 100 ; t
PSN
= 13 V, parameter V
BUK104-50L/S
Product specification
, V
140
BUK104-50S
Tj(TO)
typ.
IS
8
= 7 V; SC load
BUK104-50L/S
p
BUK104-50L/S
BUK104-50L/S
180
VIS / V = 5
50 s
Rev 1.200
j
10
= 25 ˚C
220
10
10
5
70
IS

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