BH616UV1610AI BSI [Brilliance Semiconductor], BH616UV1610AI Datasheet

BH616UV1610AI

Manufacturer Part Number

BH616UV1610AI

Description

Ultra Low Power/High Speed CMOS SRAM

Manufacturer

BSI [Brilliance Semiconductor]

Datasheet

1.BH616UV1610AI.pdf (10 pages)

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R0201-BH616UV1610

n FEATURES

Ÿ Wide V

Ÿ Ultra low power consumption :

Ÿ High speed access time :

Ÿ Automatic power down when chip is deselected

Ÿ Easy expansion with CE1, CE2 and OE options

Ÿ I/O Configuration x8/x16 selectable by LB and UB pin.

Ÿ Three state outputs and TTL compatible

Ÿ Fully static operation, no clock, no refreash

Ÿ Data retention supply voltage as low as 1.0V

n PRODUCT FAMILY

n PIN CONFIGURATIONS

Brilliance Semiconductor, Inc.

Detailed product characteristic test report is available upon request and being accepted.

-70

BH616UV1610AI

= 3.0V

= 2.0V

PRODUCT

low operation voltage : 1.65V ~ 3.6V

FAMILY

BSI

70ns at 1.8V at 85

DQ14

DQ15

VCC

DQ8

DQ9

VSS

A18

Operation current : 5.0mA at 70ns at 25

Standby current : 3uA at 25

Data retention current : 3uA at 25

DQ10

DQ11

DQ12

DQ13

48-ball BGA top view

A19

TEMPERATURE

-25

OPERATING

VSS

A17

A14

A12

Ultra Low Power/High Speed CMOS SRAM

1M X 16 bit

C to +70

C to +85

A16

A15

A13

A10

1.5mA at 1MHz at 25

CE1

DQ1

DQ3

DQ4

DQ5

A11

1.65V ~ 3.6V

reserves the right to modify document contents without notice.

RANGE

DQ0

DQ2

VCC

VSS

DQ6

DQ7

CE2

SPEED

=1.8~3.6V

(ns)

n DESCRIPTION

The BH616UV1610 is a high performance, ultra low power CMOS Static

Random Access Memory organized as 1,048,576 by 16 bits and

operates in a wide range of 1.65V to 3.6V supply voltage.

Advanced CMOS technology and circuit techniques provide both high

speed and low power features with typical operating current of 1.5mA at

1MHz at 3.0V/25

Easy memory expansion is provided by an active LOW chip enable

(CE1), an active HIGH chip enable (CE2) and active LOW output

enable (OE) and three-state output drivers.

The BH616UV1610 has an automatic power down feature, reducing the

power consumption significantly when chip is deselected.

The BH616UV1610 is made with two chips of 8Mbit SRAM by stacked

multi-chip-package.

The BH616UV1610 is available in 48-ball BGA package.

n BLOCK DIAGRAM

CE2, CE1

DQ15

DQ0

A12

A10

A11

20uA

25uA

Address

Buffer

=3.6V V

Input

STANDBY

POWER CONSUMPTION

C and maximum access time of 70ns at 1.8V/85

CCSB1

Control

, Max)

15uA

20uA

=1.8V V

Output

Buffer

Data

Input

Data

Decoder

Row

10mA

=3.6V V

Operating

BH616UV1610

1024

, Max)

7mA

A19

=1.8V

A18

A17

Address Input Buffer

BGA-48-0608

Column Decoder

A15

Memory Array

1024 x 16384

Write Driver

Column I/O

Sense Amp

PKG TYPE

A14

Revision 1.0

Jul.

A13

16384

1024

A16 A2 A1

2005

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BH616UV1610AI Summary of contents

Page 1

... I/O Configuration x8/x16 selectable by LB and UB pin. Ÿ Three state outputs and TTL compatible Ÿ Fully static operation, no clock, no refreash Ÿ Data retention supply voltage as low as 1.0V n PRODUCT FAMILY PRODUCT OPERATING FAMILY TEMPERATURE +70 BH616UV1610AI O - +85 n PIN CONFIGURATIONS ...

Page 2

BSI n PIN DESCRIPTIONS Name A0-A19 Address Input CE1 Chip Enable 1 Input CE2 Chip Enable 2 Input WE Write Enable Input OE Output Enable Input LB and UB Data Byte Control Input DQ0-DQ15 Data Input/Output Ports ...

Page 3

BSI n ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER Terminal Voltage with V TERM Respect to GND Temperature Under T BIAS Bias T Storage Temperature STG P Power Dissipation Output Current OUT 1. Stresses greater than those listed under ...

Page 4

BSI n DATA RETENTION CHARACTERISTICS (T SYMBOL PARAMETER V V for Data Retention DR CC (3) I Data Retention Current CCDR Chip Deselect to Data t CDR Retention Time t Operation Recovery Time = ...

Page 5

BSI n AC ELECTRICAL CHARACTERISTICS (T READ CYCLE JEDEC PARANETER PARAMETER NAME NAME t t AVAX AVQX E1LQV ACS1 t t E2LQV ACS2 t t BLQV GLQV E1LQX ...

Page 6

BSI (1,3,4) READ CYCLE 2 CE1 CE2 D OUT (1, 4) READ CYCLE 3 ADDRESS OE CE1 CE2 LB OUT NOTES high in read Cycle. 2. Device is continuously selected when CE1 = V 3. ...

Page 7

BSI n AC ELECTRICAL CHARACTERISTICS (T WRITE CYCLE JEDEC PARANETER PARAMETER NAME NAME t t AVAX AVWL AVWH ELWH BLWH WLWH WHAX ...

Page 8

BSI (1,6) WRITE CYCLE 2 ADDRESS CE1 CE2 LB OUT D IN NOTES must be high during address transitions. 2. The internal write time of the memory is defined by the overlap of CE1 and ...

Page 9

BSI n ORDERING INFORMATION BH616UV1610 X Note: Brilliance Semiconductor Inc. (BSI) assumes no responsibility for the application or use of any product or circuit described herein. BSI does not authorize its products for use as critical components in any application ...

Page 10

BSI n Revision History Revision No. History 1.0 Initial Production Version R0201-BH616UV1610 BH616UV1610 Draft Date July 15,2005 10 Remark Initial Revision 1.0 Jul. 2005 ...

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