SC410 SEMTECH [Semtech Corporation], SC410 Datasheet - Page 18

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SC410

Manufacturer Part Number
SC410
Description
3A EcoSpeed TM Step-Down Regulator with LDO and Ultrasonic Power Save
Manufacturer
SEMTECH [Semtech Corporation]
Datasheets

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Applications Information (continued)
Capacitor Selection
The output capacitors are chosen based on required ESR
and capacitance. The maximum ESR requirement is con-
trolled by the output ripple requirement and the DC toler-
ance. The output voltage has a DC value that is equal to
the valley of the output ripple plus 1/2 of the peak-to-peak
ripple. Change in the output ripple voltage will lead to a
change in DC voltage at the output.
The design goal is for the output voltage regulation to be
±4% under static conditions. The internal 750mV reference
tolerance is 1%. Assuming a 1% tolerance from the FB resis-
tor divider, this allows 2% tolerance due to V
this 2% error comes from 1/2 of the ripple voltage, the
allowable ripple is 4%, or 132mV for a 3.3V output.
The maximum ripple current of 2.7A creates a ripple
voltage across the ESR. The maximum ESR value allowed
is shown by the following equations.
The output capacitance is chosen to meet transient
requirements. A worst-case load release, from maximum
load to no load at the exact moment when inductor
current is at the peak, determines the required capaci-
tance. If the load release is instantaneous (load changes
from maximum to zero in < 1μs), the output capacitor
must absorb all the inductor’s stored energy. This will
cause a peak voltage on the capacitor according to the
following equation.
Assuming a peak voltage V
load release), and a 6A load release, the required capaci-
tance is shown by the next equation.
ESR
COUT
ESR
COUT
COUT
MAX
MAX
MIN
MIN
MIN
= 48.8 mΩ
= 56μF
2
L
I
2
RIPPLEMAX
2 .
1
V
RIPPLE
L
H
TOL
1
. 3
V
20
PEAK
432
PEAK
I
%
132
. 2
OUT
of 1.150 (132mV rise upon
V
705
2
3
mV
2
A
1
2
V
A
OUT
3
I
RIPPLE
3 .
1
2
V
2
OUT
. 2
2
_
705
ripple. Since
PEAK
A
2
2
If the load release is relatively slow, the output capacitance
can be reduced. At heavy loads during normal switching,
when the FB pin is above the 750mV reference, the DL
output is high and the low-side MOSFET is on. During this
time, the voltage across the inductor is approximately V
This causes a down-slope or falling di/dt in the inductor. If
the load di/dt is not much faster than the di/dt in the
inductor, then the inductor current will tend to track the
falling load current. This will reduce the excess inductive
energy that must be absorbed by the output capacitor,
therefore a smaller capacitance can be used.
The following can be used to calculate the needed capaci-
tance for a given dI
by the next equation.
Example
This causes the output current to move from 3A to 0A in
4.8μs, giving the minimum output capacitance require-
ment shown in the following equation.
Note that C
pared to 56μF based on a worst-case load release. To meet
the two design criteria of minimum 56μF, select three
capacitors rated at 22μF and 15mΩ ESR.
dl
I
I
I
C
Rate
C
LPK
LPK
MAX
LOAD
dt
OUT
OUT
= I
= 3A + 1/2 x 2.7A = 4.353A
= maximum load release = 3A
of
MAX
. 4
OUT
I
1
2
LPK
change
A
353
s
+ 1/2 x I
is much smaller in this example, 33μF com-
L
A
LOAD
1
2
of
2 .
/dt. Peak inductor current is shown
RIPPLEMAX
L
Load
TOL
H
2
1
V
2
Current
PK
20
V
. 3
I
LPK
OUT
%
432
V
OUT
V
. 4
d
3
353
3 .
I
dl
3
MAX
l
3 .
V
LOAD
dt
LOAD
A
V
SC410
3
2
dt
A
A
1
OUT
18
s
.

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