P89LPC915FDH NXP [NXP Semiconductors], P89LPC915FDH Datasheet - Page 28

• Manufacturer Part Number: P89LPC915FDH
• Description: 8-bit microcontrollers with accelerated two-clock 80C51 core 2 kB 3 V flash with 8-bit A/D converter
• Manufacturer: NXP [NXP Semiconductors]

Table 9:
* indicates SFRs that are bit addressable.
[1]
[2]
[3]
[4]
[5]
[6]
Name
TH0
TH1
TL0
TL1
TMOD
TRIM
WDCON
WDL
WFEED1
WFEED2
All ports are in input only (high impedance) state after power-up.
BRGR1 and BRGR0 must only be written if BRGEN in BRGCON SFR is logic 0. If any are written while BRGEN = 1, the result is unpredictable.
The RSTSRC register reflects the cause of the P89LPC915/916/917 reset. Upon a power-up reset, all reset source flags are cleared except POF and BOF; the power-on reset
value is xx110000.
After reset, the value is 111001x1, i.e., PRE[2:0] are all logic 1, WDRUN = 1 and WDCLK = 1. WDTOF bit is logic 1 after Watchdog reset and is logic 0 after power-on reset. Other
resets will not affect WDTOF.
On power-on reset, the TRIM SFR is initialized with a factory preprogrammed value. Other resets will not cause initialization of the TRIM register.
The only reset source that affects these SFRs is power-on reset.
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P89LPC917 Special function registers
Description
Timer 0 high
Timer 1 high
Timer 0 low
Timer 1 low
Timer 0 and 1 mode
Internal oscillator trim register
Watchdog control register
Watchdog load
Watchdog feed 1
Watchdog feed 2
SFR
addr.
8CH
8DH
8AH
8BH
A7H
C1H
C2H
C3H
89H
96H
Bit functions and addresses
T1GATE
…continued
RCCLK
PRE2
MSB
ENCLK
T1C/T
PRE1
TRIM.5
T1M1
PRE0
TRIM.4
T1M0
-
T0GATE
TRIM.3
-
WDRUN
TRIM.2
T0C/T
WDTOF
TRIM.1
T0M1
WDCLK
TRIM.0
T0M0
LSB
Reset value
Hex
00
00
00
00
00
FF
[5] [6]
[4] [6]
Binary
00000000
00000000
00000000
00000000
00000000
11111111