P89LPC915FDH NXP [NXP Semiconductors], P89LPC915FDH Datasheet - Page 53

• Manufacturer Part Number: P89LPC915FDH
• Description: 8-bit microcontrollers with accelerated two-clock 80C51 core 2 kB 3 V flash with 8-bit A/D converter
• Manufacturer: NXP [NXP Semiconductors]

Philips Semiconductors
9397 750 14397
Product data
Fig 21. Watchdog timer in Watchdog mode (WDTE = 1).
(1) Watchdog reset can also be caused by an invalid feed sequence, or by writing to WDCON not immediately followed by a
Watchdog
oscillator
feed sequence.
MOV WFEED1, #0A5H
MOV WFEED2, #05AH
PCLK
9.27.1 Software reset
9.27.2 Dual data pointers
9.28.1 General description
9.27 Additional features
9.28 Flash program memory
WDCON (A7H)
32
can only be reset by a power-on reset. When the Watchdog feature is disabled, it can
be used as an interval timer and may generate an interrupt.
Watchdog timer in Watchdog mode. Feeding the Watchdog requires a two-byte
sequence. If PCLK is selected as the Watchdog clock and the CPU is powered-down,
the Watchdog is disabled. The Watchdog timer has a time-out period that ranges
from a few s to a few seconds. Please refer to the P89LPC915/916/917 User’s
Manual for more details.
The SRST bit in AUXR1 gives software the opportunity to reset the processor
completely, as if an external reset or Watchdog reset had occurred. Care should be
taken when writing to AUXR1 to avoid accidental software resets.
The dual Data Pointers (DPTR) provides two different Data Pointers to specify the
address used with certain instructions. The DPS bit in the AUXR1 register selects
one of the two Data Pointers. Bit 2 of AUXR1 is permanently wired as a logic 0 so that
the DPS bit may be toggled (thereby switching Data Pointers) simply by incrementing
the AUXR1 register, without the possibility of inadvertently altering other bits in the
register.
The P89LPC915/916/917 Flash memory provides in-circuit electrical erasure and
programming. The Flash can be erased, read, and written as bytes. The Sector and
Page Erase functions can erase any Flash sector (256 bytes) or page (16 bytes). The
PRE2
PRESCALER
PRE1
Rev. 04 — 17 December 2004
8-bit microcontrollers with accelerated two-clock 80C51 core
CONTROL REGISTER
PRE0
–
–
8-BIT DOWN
WDL (C1H)
COUNTER
P89LPC915/916/917
WDRUN
WDTOF
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
WDCLK
Figure 21
002aaa423
RESET
see note (1)
SHADOW
REGISTER
FOR WDCON
shows the
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