ATA5279_10 ATMEL [ATMEL Corporation], ATA5279_10 Datasheet

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ATA5279_10

Manufacturer Part Number
ATA5279_10
Description
Antenna Driver for Multiple Antennas
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Features
1. Description
The Atmel
tems. It can drive up to six low-frequency-antennas (i.e., coils) to provide a wake-up
and initialization channel to the key fob.
Figure 1-1.
S_CLK
OSCO
NRES
MACT
BCNT
S_CS
MOSI
MISO
OSCI
Six Connections for Series-resonant LF Coil Antennas
Drives up to 1A Peak Current on the First Three Channels and up to 700mA Peak on the
Second Three, Largely Independent of the Battery Voltage
On-off-keyed Data Modulation with up to 5.7kbit/s (Manchester Coded)
Sinusoidal-like Output Signal for Superior EMC Behavior
20 Selectable Steps for Current Regulation for Field Strength Measurement (RSSI)
Output Driver Stages are Protected Against Electrical and Thermal Overload
Very Low Power-down Current Consumption
SPI Interface for Easy Microcontroller Bus Connection
LF Data Buffer to Minimize Microcontroller’s CPU Load During a Data Transmission
Small Outline Package: QFN48, 7mm
IRQ
VIF
®
Oscillator
ATA5279 is an LF coil driver IC intended for passive entry/-go (PEG) sys-
AGND
SPI
Protocol Handling
Block Diagram
Communication
Control Logic
POR, BG, UV/OV
Internal Supply
VS
LF Data Buffer
Driver Stage
Reference
Control
RGND
VCC
7mm
VL
Sine Wave
Generator
Controller
Integrator
and Hold
Sample
Boost
DC
DC
PGND
CINT
VSHS
Return Line
Zero Cross
Detector
HP 1-3
LP 1-3
Driver
VDS
A1P
A2P
A3P
A4P
A5P
A6P
A1N
A2N
A3N
A4N
A5N
A6N
VSHF
Antenna Driver
for Multiple
Antennas
Atmel ATA5279
9125I–RKE–09/10

Related parts for ATA5279_10

ATA5279_10 Summary of contents

Page 1

Features • Six Connections for Series-resonant LF Coil Antennas • Drives Peak Current on the First Three Channels and up to 700mA Peak on the Second Three, Largely Independent of the Battery Voltage • On-off-keyed Data Modulation ...

Page 2

Pin Configuration Figure 2-1. Pinning QFN48 Table 2-1. Pin Description Pin Symbol Function Heat Slug PGND Backside ground connection 1 VS Battery supply pin 2 RGND Reference ground 3 CINT Integration capacitor connection 4 VCC Analog 5V stabilization capacitor ...

Page 3

Table 2-1. Pin Description (Continued) Pin Symbol Function 21 VDS1 Driver supply pin 1 22 A4N1 Coil 4 negative connection line pin 1 23 A4N2 Coil 4 negative connection line pin 2 24 A1N1 Coil 1 negative connection line pin ...

Page 4

Functional Description 3.1 Operation Modes Atmel • Power-down mode (reset state) • Idle mode • Operating mode • Shutdown mode • Diagnosis mode Power-down mode is active after supply voltages have been applied to the chip. No internal circuitry ...

Page 5

Coil Driver Stage The driver stage for each coil consists of two N-channel DMOS transistors. The low-side tran- sistor is in Darlington configuration to maintain a source-follower characteristic. Figure 3-1. In the graphic above, the names of internal pins ...

Page 6

Table 3-1. States of Driver Outputs within Operation Modes Operation/ Mode Transmission Mode Output Entering by SPI cmd Selected driver active AxP others are on High Level (VDS) Selected driver stays on AxN low level Others are on High Level ...

Page 7

In application, the output coil current is the fixed valued (selectable via SPI). Hence, the required output voltage is calculated as follows: V Out,p Here, Z appropriate return line current selector (see also 32) and R see also 3.4 Boost ...

Page 8

The IC allows the use of a current step not intended for a particular driver group; however, in this case, full functionality, especially a stabilized coil current, cannot be guaranteed. See also the Control Logic block description for an overview ...

Page 9

Functional Description of Diagnosis Mode In this diagnosis mode, the coil-line drivers themselves are switched to high impedance. Hence, only the test structure at every coil connection (both at the positive outputs AxP of the drivers and at the ...

Page 10

In the following example, there is a short circuit between the positive coil connections of coil 1 and 2. Figure 3-4. Taking the circuit situation shown above, the test run starts with both S_L1P and S_L2P switches closed (default state ...

Page 11

Table 3-2. Sequence for Example 1, Using the Diagnosis Mode Step Command 1 Select Driver 2 Get Driver Setup 3 Select Driver 4 Get Driver Setup 5 Set Coil Current command - 7 Get Driver Setup 8 ...

Page 12

The second example circuit has two faults in the circuitry. Figure 3-5. If channel four is activated in normal operation, a fault shutdown will occur. The reason for this shutdown (i.e., the entry in the fault register) could either be ...

Page 13

Table 3-3. Sequence for Example 2, Using the Diagnosis Mode Step Command 1 Select Driver 2 Get Driver Setup 3 Set Coil Current command - 5 Get Driver Setup 6 Set Coil Current command ...

Page 14

Figure 3-6. SPI Operation in POL = 1 and PHA = 1 Mode (Default Mode after Reset) S_CS Setup S_CLK MISO Z X MOSI Figure 3-7. SPI Operation in POL = 0 and PHA = 0 Mode ...

Page 15

Figure 3-9. SPI Operation in POL = 0 and PHA = 1 Mode S_CS Setup S_CLK MISO Z X MOSI The configuration mode can be selected with the appropriate SPI command (see “General Command Description” on page ...

Page 16

Table 3-4. States of Control I/Os Name Pin # Direction S_CS 38 Input S_CLK 39 Input S P MOSI 37 Input I Push-pull Tristate (S_CS = low) MISO 36 output Low/High (S_CS = high) VIF 6 Input NRES 40 Input ...

Page 17

Figure 3-11. Structure of 128-bit FIFO Command Buffer From SPI The read pointer indicates the next word to be processed by the Modulator Stage, whereas the write pointer indicates the next free location for data from the SPI. These pointers ...

Page 18

Control Logic The internal control logic handles all information coming from the SPI and controls the power stages. Diagnostic information is also collected and evaluated here. 3.9.1 Modulator Stage The modulator stage controls the coil drivers. It gets all ...

Page 19

LF data is transmitted on-off-keyed (OOK). “1” enables the field, whereas “0” disables it. Note that the field generation strongly depends on the bandwidth (the Q factor) of the coil too narrow, the receiver might not be ...

Page 20

In this example, the output signal of the modulator resembles the illustration below. Figure 3-13. Example of Data Transmission of Two Consecutive Commands The value for t and 22 periods in high speed mode, with one period being 8µs when ...

Page 21

General Command Description The following commands are directly processed by the control logic, i.e., they are not fed into the data buffer: Table 3-6. Command Get status info Get driver setup Get fault info Reset fault status Set SPI ...

Page 22

Get Driver Setup: This command returns the actual setup of the driver stage, i.e., the selected coil, encoded in the bits D “Select Driver” and “Set Coil Current” command description below for details on bit coding). This command is ...

Page 23

Select Driver: This command selects the coil that driven or tested next. The BR-bit indicates the modulation speed (0 for 3.9kbit/s, i.e., 32LF periods and 1 for 5.7kbit/s, i.e., 22LF periods). • The D for high-current ...

Page 24

It is important that the amount of nibbles passed in the header word matches the number of words transferred afterwards to the IC data consistency checking can be carried out here odd number of nibbles is ...

Page 25

Status Monitor The status monitor holds all information from the diagnosis stage. In case of an existing fault, all power stages are disabled. As soon as a fault is stored, an interrupt request (IRQ) to the microcontroller is generated. ...

Page 26

Oscillator This block provides the clock signals internally needed for control logic, the LF driver stage, and the boost converter. The oscillator requires an external clock source, which can either be an active signal from a microcontroller for example, ...

Page 27

Application Find below a typical application schematic for the Atmel Figure 4-1. Application Schematic for the Atmel ATA5279 VBATT OSCI Internal Supply Oscillator X1 POR, BG, UV/OV OSCO S_CS S_CLK SPI LF Data ...

Page 28

Table 4-1. 4.1 Application Hints An important application aspect is the thermal budget. Under certain conditions, high power dissipations can occur during operation of the chip. The Atmel mainly depends on the supply voltage and the selected antenna output current. ...

Page 29

See the following description for details: P diss,tot Mean value measured during an LF carrier transmission with the desired output current. P out P diss,ext P out Alternative formula for calculating the output power. Note: The input ...

Page 30

Note: Under worst case conditions, e.g., low supply voltage and high antenna impedance, the maxi- mum antenna current might not be reached. A “static” operation of ATA5279 is not allowed for typical transmit currents of several hundreds of mAs. Typical ...

Page 31

Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated ...

Page 32

Functional Parameters All parameters valid for 7.0V VS 16.5V and –40°C T No. Parameters Test Conditions 1 Power Supply VS-pin power-down 1 mode supply current VS-pin idle mode 1 supply current Internal VCC voltage 7V ...

Page 33

Functional Parameters (Continued) All parameters valid for 7.0V VS 16.5V and –40°C T No. Parameters Test Conditions Driver output sink 3.3 resistance during I OSCO operation Driver output source 3.4 resistance during I OSCO startup Driver output source 3.5 ...

Page 34

Functional Parameters (Continued) All parameters valid for 7.0V VS 16.5V and –40°C T No. Parameters Test Conditions Sinking current limit 5.2 Idle mode, DC ramping (RMS) V AxP,pp Signal difference carrier 5.3 I coil,p to harmonics ...

Page 35

Functional Parameters (Continued) All parameters valid for 7.0V VS 16.5V and –40°C T No. Parameters Test Conditions 8 Sample and Hold Stage Sampling state Current step 20 Sampled differential selected 8.1 voltage V VSHS V VSHS 9 Integrator Stage ...

Page 36

Functional Parameters (Continued) All parameters valid for 7.0V VS 16.5V and –40°C T No. Parameters Test Conditions 11 Digital Interface (SPI, Control Logic) Supply current in 11.1 V VIF operation mode Supply current in 11.2 V VIF power-down mode ...

Page 37

Ordering Information Extended Type Number ATA5279P-PLQW ATA5279P-PLPW 10. Package Information Package: VQFN_7 x 7_48L Exposed pad 4.5 x 4.5 Dimensions in mm Not indicated tolerances ±0.05 1 Pin 1 identification 12 Drawing-No.: 6.543-5137.01-4 Issue: 1; 19.10.06 9125I–RKE–09/10 Package VQFN48, ...

Page 38

Revision History Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Revision No. 9125I-RKE-09/10 9125H-RKE-05/10 9125G-RKE-01/10 9125F-RKE-09/09 9125E-RKE-04/09 9125D-RKE-02/09 9125C-RKE-01/09 9125B-RKE-12/08 Atmel ATA5279 38 History Figure ...

Page 39

Atmel Corporation Atmel Asia Limited 2325 Orchard Parkway Unit 01-5 & 16, 19/F San Jose, CA 95131 BEA Tower, Millennium City 5 USA 418 Kwun Tong Road Tel: (+1)(408) 441-0311 Kwun Tong, Kowloon Fax: (+1)(408) 487-2600 HONG KONG Tel: (+852) ...

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