ATA5279_10 ATMEL [ATMEL Corporation], ATA5279_10 Datasheet - Page 17

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ATA5279_10

Manufacturer Part Number
ATA5279_10
Description
Antenna Driver for Multiple Antennas
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
3.8.2
9125I–RKE–09/10
Usage
Figure 3-11. Structure of 128-bit FIFO Command Buffer
The read pointer indicates the next word to be processed by the Modulator Stage, whereas
the write pointer indicates the next free location for data from the SPI. These pointers are con-
trolled by the internal logic to enable the first-in-first-out functionality.
After wake-up from power-down, the buffer is empty and ready to receive commands and LF
data. Any LF command and data is fed into the buffer via the SPI. The buffer can be filled even
during an active data modulation, i.e., when some LF data and/or commands remain in the
buffer while waiting to be processed. This increases the independency of the coil driver from
the microcontroller. An interrupt request (IRQ) is triggered when the fill state of the buffer
drops below 25% or if too many words are sent and a FIFO overflow occurs.
Seamless data processing is an important feature of the command buffer. LF data intended for
the same coil and the same current step can be distributed to several commands without the
risk of having unwanted gaps in the LF telegram. This allows protocols to have any length and
is usable both with the Send LF-data and the Send Carrier command. Refer also to the
tion 3.9.1 “Modulator Stage” on page 18
From SPI
8
General Command
Processing
Selector
Data
8
for further details.
8
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
Atmel ATA5279
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
Write Pointer
Read Pointer
Modulator Stage
Sec-
17

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