W49V002FAQ Winbond, W49V002FAQ Datasheet - Page 20

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W49V002FAQ

Manufacturer Part Number
W49V002FAQ
Description
256K X 8 CMOS FLASH MEMORY WITH FWH INTERFACE
Manufacturer
Winbond
Datasheet
Timing Waveforms for Programmer Interface Mode, continued
Chip Erase Timing Diagram
Sector Erase Timing Diagram
(Internal A[17:0])
DQ[7:0]
A[10:0]
R/
#OE
#WE
DQ[7:0]
#C
(Internal A[17:0])
A[10:0]
Note: The internal address A[17:0] are converted from external Column/Row address.
R/
#WE
#OE
#C
Column/Row Address are mapped to the Low/High order internal address.
i.e. Column Address A[10:0] are mapped to the internal A[10:0],
SA = Sector Address, Please ref. to the "Table of Command Definition"
Row Address A[6:0] are mapped to the internal A[17:11].
Note: The internal address A[17:0] are converted from external Column/Row address.
5555
Column/Row Address are mapped to the Low/High order internal address.
i.e. Column Address A[10:0] are mapped to the internal A[10:0],
5555
SB0
T
WP
AA
AA
T
SB0
Row Address A[6:0] are mapped to the internal A[17:11].
WP
T
Six-byte code for 3.3V-only software chip erase
WPH
T
WPH
2AAA
2AAA
SB1
Six-byte code for 3.3V-only software
sector erase
55
55
SB1
5555
5555
SB2
80
80
SB2
- 20 -
5555
5555
SB3
SB3
AA
AA
2AAA
2AAA
SB4
SB4
55
55
5555
SA
10
SB5
SB5
30
Internal Erasure Starts
Internal Erase starts
T
T
EC
EC
W49V002FA

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